ISL6326 Intersil Corporation, ISL6326 Datasheet
ISL6326
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ISL6326 Summary of contents
Page 1
... Eliminating ground differences improves regulation and protection accuracy. The threshold- sensitive enable input is available to accurately coordinate the start up of the ISL6326 with any other voltage rail. Dynamic-VID™ technology allows seamless on-the-fly VID changes. The offset pin allows accurate voltage offset settings that are independent of VID setting ...
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... Pinout 2 ISL6326 ISL6326 (40 LD QFN) TOP VIEW VID6 1 VID5 2 VID4 3 VID3 4 VID2 5 GND VID1 6 VID0 7 VRSEL 8 OFS 9 DAC ISEN3+ 30 ISEN3 ISEN2- ISEN2 PWM2 PWM4 25 ISEN4+ 24 ISEN4- 23 ISEN1 ISEN1 ...
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... ISL6326CR Block Diagram - RGND X1 + VSEN + OVP - +175mV SS VRSEL VID7 VID6 VID5 Dynamic VID4 VID VID3 D/A VID2 VID1 VID0 DAC OFS OFFSET REF FB COMP IDROOP VR_HOT THERMAL MONITOR VR_FAN TM 3 ISL6326 VDIFF VR_RDY FS CLOCK AND RAMP GENERATOR N SOFTSTART AND FAULT LOGIC ...
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... VID7 ISL6326 VID6 VID5 VID4 VID3 VID2 VID1 VID0 VRSEL VR_FAN VR_HOT VIN EN_PWR GND TCOMP TM OFS + ISL6326 +12V PVCC +5V VCC ISL6612 DRIVER PWM VCC DAC REF PWM1 +12V ISEN1- PVCC ISEN1+ VCC ISL6612 DRIVER PWM PWM2 ISEN2- ISEN2+ ...
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... VID7 VID6 ISL6326 VID5 VID4 VID3 VID2 VID1 VID0 VRSEL VR_FAN VR_HOT VIN EN_PWR GND TCOMP TM OFS +5V +5V NTC 5 ISL6326 +12V +5V VCC VCC DAC GND REF ISL6614 DRIVER ISEN1+ ISEN1- PWM1 PWM1 PWM2 PWM3 ISEN3- ISEN3+ ISEN2+ ISEN2- +12V PWM2 VCC ...
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... Operating Conditions Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V ±5% Ambient Temperature (ISL6326CRZ 0°C to 70°C Ambient Temperature (ISL6326IRZ .-40°C to 85°C CAUTION: Stress above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied ...
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... TM Input Voltage for VR_FAN Reset TM Input Voltage for VR_HOT Trip TM Input Voltage for VR_HOT Reset Leakage Current of VR_FAN VR_FAN Low Voltage 7 ISL6326 Operating Conditions: VCC = 5V, Unless Otherwise Specified (Continued) TEST CONDITIONS Offset resistor connected to ground Voltage below VCC, offset resistor connected to VCC R = 100kΩ ...
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... During soft-start, VDAC rises from 0 to 1.1V first and then ramp to VID voltage after receiving valid VID. 6. Soft-start ramp rate is determined by the adjustable soft-start oscillator frequency at the speed of 6.25mV per cycle. 8 ISL6326 Operating Conditions: VCC = 5V, Unless Otherwise Specified (Continued) TEST CONDITIONS With externally pull-up resistor connected to VCC ...
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... ICs. When EN_PWR is driven above 0.875V, the ISL6326 is active depending on status of EN_VTT, the internal POR, and pending fault states. Driving EN_PWR below 0.745V will clear all fault states and prime the ISL6326 to soft-start when re-enabled. EN_VTT - This pin is another threshold-sensitive enable input for the controller. It’ ...
Page 10
... Connect this pin through an NTC thermistor to GND and a resistor to VCC of the controller. The voltage at this pin is reverse proportional to the VR temperature. ISL6326 monitors the VR temperature based on the voltage at the TM pin and outputs VR_HOT and VR_FAN signals. VR_HOT - VR_HOT is used as an indication of high VR temperature ...
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... PWM Operation The timing of each channel is set by the number of active channels. The default channel setting for the ISL6326 is four. The switching cycle is defined as the time between PWM pulse termination signals of each channel. The cycle time of the pulse signal is the inverse of the switching frequency set by the resistor between the FS pin and ground ...
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... F is the switching frequency of each phase. SW Current Sensing ISL6326 senses the current continuously for fast response. ISL6326 supports inductor DCR sensing, or resistive sensing techniques. The associated channel current sense amplifier uses the ISEN inputs to reproduce a signal proportional to the inductor current proportional to the inductor current ...
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... DAC) and offset errors in the OFS current source, remote-sense and error amplifiers. Intersil specifies the guaranteed tolerance of the ISL6326 to include the combined tolerances of each of these elements. 13 ISL6326 The output of the error amplifier, V sawtooth waveforms to generate the PWM signals ...
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... ISL6326 VID5 VID6 VOLTAGE 12.5mV 6.25mV ( 1 1.59375 1.5875 1.58125 1.575 1.56875 1.5625 1.55625 ...
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... ISL6326 VID5 VID6 VOLTAGE 12.5mV 6.25mV ( 1.11875 1.1125 1.10625 1 1.09375 OFF OFF ...
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... ISL6326 VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0 VOLTAGE 1.46250 1.45625 1.45000 1.44375 1.43750 1.43125 1.42500 ...
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... ISL6326 VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0 VOLTAGE 0.96250 0.95625 0.95000 0.94375 0.93750 0.93125 0.92500 ...
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... OFS is the total output current is the DCR SENSE (EQ. 10) Output Voltage Offset Programming The ISL6326 allows the designer to accurately adjust the offset voltage. When a resistor connected between OFS OFS to VCC, the voltage across it is regulated to 1.6V. This causes a proportional current ( flow into OFS ...
Page 19
... After remaining at 1.1V for some time, ISL6326 reads the VID code at VID input pins. If the VID code is valid, ISL6326 will regulate the output to the final VID setting. If the VID code is OFF code, ISL6326 will shut down, and cycling VCC, EN_PWR or EN_VTT is needed to restart ...
Page 20
... MOSFETs. If the overvoltage condition reoccurs, the ISL6326 will again command the lower MOSFETs to turn on. The ISL6326 will continue to protect TD3 TD4 TD5 the load in this fashion as long as the overvoltage condition occurs ...
Page 21
... F SW For the individual channel overcurrent protection, the ISL6326 continuously compares the sensed current signal of each channel with the 120µA reference current. If one channel current exceeds the reference current, ISL6326 will pull PWM signal of this channel to low for the rest of the switching cycle. This PWM signal can be turned on next cycle if the sensed channel current is less than the 120µ ...
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... Integrated Temperature Compensation When the TCOMP voltage is equal or greater than VCC/15, ISL6326 will utilize the voltage at TM and TCOMP pins to compensate the temperature impact on the sensed current. The block diagram of this function is shown in Figure 14. TM ...
Page 23
... NTC temperature and the temperature of the current sense component. 23 ISL6326 ISL6326 multiplexes the TCOMP factor N with the TM digital signal to obtain the adjustment gain to compensate the temperature impact on the sensed channel current. The compensated channel current signal is used for droop and ...
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... FB and VDIFF pins reverse proportional to the temperature. The external temperature compensation network can only compensate the temperature impact on the droop, while it has no impact to the sensed current inside ISL6326. Therefore, this network cannot compensate for the temperature impact on the overcurrent protection function. Current Sense Output The current from the IDROOP pin is the sensed average current inside the ISL6326 ...
Page 25
... The total power dissipated by the upper MOSFET at full load can now be approximated as the summation of the results from Equations 26, 27, and 28. Since the power equations depend on MOSFET parameters, choosing the correct MOSFETs can be an iterative process involving repetitive 25 ISL6326 ⎛ ⎞ (EQ. 25) ⎜ ...
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... (OPTIONAL COMP FB + IDROOP DROOP - VDIFF FIGURE 16. COMPENSATION CONFIGURATION FOR LOAD-LINE REGULATED ISL6326 CIRCUIT , has already been chosen The target 0 0 FN9262.0 April 21, 2006 ...
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... IDROOP VDIFF FIGURE 17. COMPENSATION CIRCUIT FOR ISL6326 BASED CONVERTER WITHOUT LOAD-LINE REGULATION The first step is to choose the desired bandwidth, f compensated system. Choose a frequency high enough to assure adequate transient performance but not higher than 1/3 of the switching frequency. The type-III compensator has an extra high-frequency pole, f ...
Page 28
... MAX ΔI 2 Input Supply Voltage Selection The VCC input of the ISL6326 can be connected either directly to a +5V supply or through a current limiting resistor to a +12V supply. An integrated 5.8V shunt regulator maintains the voltage on the VCC pin when a +12V supply is used. A 300Ω resistor is suggested for limiting the current into the VCC pin to a worst-case maximum of approximately 25mA ...
Page 29
... The result from the high current slew rates produced by the upper MOSFETs turn on 29 ISL6326 and off. Select low ESL ceramic capacitors and place one as close as possible to each upper MOSFET drain to minimize board parasitic impedances and maximize suppression. ...
Page 30
... Long distances between input capacitors and MOSFET drains result in too much trace inductance and a reduction in capacitor performance. Locate the output capacitors between the inductors and the load, while keeping them in close proximity to the microprocessor socket. 30 ISL6326 FN9262.0 April 21, 2006 ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 31 ISL6326 2X 0.15 C ...