ISL97650 Intersil Corporation, ISL97650 Datasheet

no-image

ISL97650

Manufacturer Part Number
ISL97650
Description
4-Channel Integrated LCD Supply
Manufacturer
Intersil Corporation
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISL97650ARTZ
Manufacturer:
INTERSIL
Quantity:
18
Part Number:
ISL97650ARTZ-T
Manufacturer:
INTERSIL
Quantity:
20 000
Part Number:
ISL97650ARTZK
Manufacturer:
Intersil
Quantity:
1 996
4-Channel Integrated LCD Supply
The ISL97650 represents a high power, integrated LCD
supply IC targeted at large panel LCD displays. The
ISL97650 integrates a high power, 2.6A boost converter for
A
charge pump driver, V
regulator with 2A switch for logic generation.
The ISL97650 has been designed for ease of layout and low
BOM cost. Supply sequencing is integrated for both
A
The TFT power sequence uses a separate enable to the
logic buck regulator for maximum flexibility.
Peak efficiencies are >90% for both the boost and buck while
operating from a 4V to 14V input supply. The current mode
buck offers superior line and load regulation. Available in the
36 Ld QFN package, the ISL97650 is specified for ambient
operation over the -40°C to +105°C temperature range.
Pinout
VDD
VDD
VSUP
CM2
FBL
CTL
LX1
LX2
LXL
CB
NC
generation, an integrated V
-> V
1
2
3
4
5
6
7
8
9
OFF
-> V
ON
ON
and A
(36 LD TQFN)
TOP VIEW
slicing circuitry and a buck
ISL97650
THERMAL
®
PAD
VDD
1
/V
ON
OFF
Data Sheet
charge pump, a V
-> V
ON
sequences.
27
26
25
24
23
22
21
20
19
AGND1
PGND1
PGND2
VINL
NOUT
PGND3
FBN
VREF
FBP
1-888-INTERSIL or 1-888-468-3774
OFF
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Features
• 4V to 14V input supply
• A
• Integrated V
• V
• V
• Automatic start-up sequencing
• V
• Thermally enhanced 6x6 Thin QFN package
• Pb-free plus anneal available (RoHS compliant)
Applications
• LCD monitors (15”+)
• LCD-TVs (up to 40”)
• Notebook displays (up to 16”)
• Industrial/medical LCD displays
Ordering Information
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
ISL97650ARTZ-T ISL97650ARTZ 13” (4k pcs) 36 Ld 6x6
ISL97650ARTZ-TK ISL97650ARTZ 13” (1k pcs) 36 Ld 6x6
PART NUMBER
November 28, 2006
- A
- Independent logic enable
VDD
OFF
LOGIC
ON
VDD
(Note)
slicing
All other trademarks mentioned are the property of their respective owners.
boost up to 20V, with integrated 2.8A FET
charge pump driver, down to -18V
buck down to 1.2V, with integrated 2A FET
|
-> V
Intersil (and design) is a registered trademark of Intersil Americas Inc.
ON
OFF
charge pump, up to 35V out
-> V
MARKING
Copyright Intersil Americas Inc. 2006. All Rights Reserved
PART
ON
or A
VDD
TAPE &
REEL
/V
OFF
ISL97650
-> V
PACKAGE
Thin QFN
Thin QFN
(Pb-Free)
FN9198.3
ON
DWG. #
L36.6x6
L36.6x6
PKG.

Related parts for ISL97650

ISL97650 Summary of contents

Page 1

... V charge pump VDD ON charge pump driver, V slicing circuitry and a buck ON regulator with 2A switch for logic generation. The ISL97650 has been designed for ease of layout and low BOM cost. Supply sequencing is integrated for both A -> V -> V and A /V VDD ...

Page 2

... VDD D Minimum Duty Cycle MIN D Maximum Duty Cycle MAX 2 ISL97650 Thermal Information = +25°C) Thermal Resistance 6x6 QFN Package (Notes Maximum Junction Temperature (Plastic Package +150°C Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C Maximum Lead Temperature (Soldering 10s +300°C Power Dissipation ≤ ...

Page 3

... Leakage Current FBN Regulation Voltage FBN ACCN V Output Accuracy OFF D_NCP_max Max Duty Cycle of the Negative Charge Pump Rpd(FBN)off Pull-Down Resistance, Not Active 3 ISL97650 = V = 15V 25V, V BOOST SUP ON CONDITIONS Current limit See graphs and component recommendations 5V < V < 13V IN 100mA < Iload < 200mA T = +25° ...

Page 4

... T_off Thermal Shut-Down (latched and reset by power cycle or EN cycle) Vth_A (FBB) A Boost Short Detection VDD VDD Vth_V (FBL) V Buck Short Detection LOGIC LOGIC 4 ISL97650 = V = 15V 25V, V BOOST SUP ON CONDITIONS Charge Pump V = 25V (2X Charge Pump 34V (3X Charge Pump) ON Input Switch ...

Page 5

... I (mA) O FIGURE 1. BOOST EFFICIENCY 100 500 1000 I (mA) O FIGURE 3. BUCK EFFICIENCY 5 ISL97650 = V = 15V 25V, V BOOST SUP ON CONDITIONS V(FBP) falling less than V(FBN) rising more than C = 220nF DEL VDELB > 0.9V VDELB < 0.9V VDELB < 20V C = 220nF DEL C = 220nF DEL C ...

Page 6

... LOAD REGULATION vs I OFF Ch1=LX(boost)(5V/DIV) Ch2=Io(Boost)(10mA/DIV) 200ns/DIV FIGURE 7. BOOST DISCONTINUOUS MODE Ch1=LX(buck)(5V/DIV) Ch2=Io(Buck)(10mA/DIV) 400ns/DIV FIGURE 9. BUCK DISCONTINUOUS MODE 6 ISL97650 (Continued OFF FIGURE 8. THRESHOLD OF BOOST FROM MODE FIGURE 10. THRESHOLD OF BUCK FROM MODE 0 -0.05 -0 ...

Page 7

... Ch4 = I IN VDD, FIGURE 11. BOOST CONVERTER PULSE-SKIPPING MODE WAVEFORM Ch1 = V (V )(10mV/DIV) LOGIC BUCK Ch2 = Io(Buck)(100mA/DIV) 1ms/DIV FIGURE 13. TRANSIENT RESPONSE OF BUCK 7 ISL97650 (Continued) Ch1 = A INDUCTOR Ch2 = Io(Boost)(100mA/DIV) FIGURE 12. TRANSIENT RESPONSE OF BOOST Ch1 = )(100mV/DIV) VDD BOOST 1ms/DIV , Ch2 = V ...

Page 8

... EN 36 VDC2 Exposed Die Plate N/A 8 ISL97650 Internal boost switch connection Internal boost switch connection Logic buck, boost strap pin Buck converter output No connect. Connect to die pad and GND for improved thermal efficiency. Positive supply for charge pumps Logic buck feedback pin ...

Page 9

... ENL DELB V IN2 V SUP N OUT - FBN + 0.2V UVLO COMPARATOR - + 0.4V 0.75 V REF - + FBP - + V REF SUP C1- 9 ISL97650 V REF SAWTOOTH GENERATOR ∑ REFERENCE BIAS AND SEQUENCE CONTROLLER REGULATOR CURRENT LIMIT CURRENT AMPLIFIER COMPARATOR - + CURRENT LIMIT THRESHOLD SUP C1+ P C2+ C2- OUT SLOPE COMPENSATION BUFFER CONTROL LOGIC ...

Page 10

... C7 C1- 220nF C2+ C8 C2- 220nF VDC2 C17 0.47µF CTL VINL C9 C10 CM2 R2 10µF 4.7nF 10k ENL AGND *Open component positions 10 ISL97650 D1 L1 6.8µF C2 20µF LX1 LX2 BOOST FBB DELB R20 500kΩ PGND3 C11 C20 220nF V 820p REF R6 40k FBN ...

Page 11

... The minimum duty cycle of the ISL97650 is 25%. When the operating duty cycle is lower than the minimum duty cycle, the part will not switch in some cycles randomly, which will cause some LX pulses to be skipped. In this case, LX pulses are not consistent any more, but the output voltage (A still regulated by the ratio of R3 and R5 ...

Page 12

... PART NUMBER PI Loop Compensation (Boost Converter) RLF7030T-6R8N3R0 The boost converter of ISL97650 can be compensated network connected from CM1 pin to ground 4.7nF CDR7D28MNNP-6R8NC and R1 = 10k RC network is used in the demo board. A higher resistor value can be used to lower the transient ...

Page 13

... Buck Converter The buck converter is the step down converter, which supplies the current to the logic circuit of the LCD system. The ISL97650 integrates an 20V N-channel MOSFET to save cost and reduce external component count. In the continuous current mode, the relationship between input voltage and output voltage is as following: ...

Page 14

... Murata PI Loop Compensation (Buck Converter) The buck converter of ISL97650 can be compensated network connected from CM2 pin to ground 4.7nF and network is used in the demo board. The larger value resistor can lower the transient overshoot, however, at the expense of stability of the loop. ...

Page 15

... C cause the chip to power down if present for more than the time TFD (see "Electrical Specification" section and also Figure “V FUNCTION DIAGRAM” on page 15 ISL97650 VSUP M2 M4 VSUP ...

Page 16

... NDMOS FET, with ~1k impedance. Once the start-up sequence has completed, CTL is enabled and acts as a multiplexer control such that if CTL is low, COM connects to DRN through a 30Ω internal MOSFET, and if CTL is high, COM connects to P internally via a 5Ω MOSFET. OUT 16 ISL97650 VSUP VDD C20 820pF FBN 0.2V M2 ...

Page 17

... When a fault is detected, the device will latch off until either EN is toggled or the input supply is recycled. When the input voltage is higher than 3.85V well the ENL is high. an internal current LOGIC source starts to charge upper threshold using a CDLY 17 ISL97650 t START- VOFF t VON START-UP SEQUENCE ...

Page 18

... MOSFET of the boost and buck converters triggers the current limit threshold, the PWM comparator will disable the output, cycle by cycle, until the current is back to normal. (EQ. 24) The ISL97650 detects each feedback voltage OFF feedback is lower than the fault threshold, then a timed fault ramp will appear on CDEL ...

Page 19

... IC. The bottom and top PCB areas especially should be maximized to allow thermal dissipation to the surrounding air. 8. Minimize feedback input track lengths to avoid switching noise pick-up. A demo board is available to illustrate the proper layout implementation. 19 ISL97650 FN9198.3 November 28, 2006 ...

Page 20

... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 20 ISL97650 L36.6x6 A 36 LEAD THIN QUAD FLAT NO-LEAD PLASTIC PACKAGE ...

Related keywords