LP5521TMEV National Semiconductor, LP5521TMEV Datasheet
LP5521TMEV
Specifications of LP5521TMEV
Related parts for LP5521TMEV
LP5521TMEV Summary of contents
Page 1
... LP5521 is available in tiny 2.1x1.7x0.6 mm microSMD-20 package and in 4.0x5.0x0.8 mm bumped LLP-24 package. Comprehensive application tools are available, including command compiler for easy LED sequence programming. Typical Application © 2008 National Semiconductor Corporation Features ■ Adaptive charge pump with 1x and 1.5x gain provides up to 95% LED drive efficiency ■ ...
Page 2
Connection Diagrams and Package Mark Information Thin microSMD-20 Package (2.1 x 1.7 x 0.6 mm, 0.4 mm pitch) Top View Package Mark www.national.com NS Package Number TMD20ECA 20186271 Package Mark - Top View 2 20186272 Bottom View 20186296 ...
Page 3
Connection Diagrams and Package Mark Information Bumped LLP-24 Package ( 0.8 mm, 0.5 mm pitch) Bottom View Ordering Information Order Number Package LP5521TM µSMD LP5521TM X µSMD LP5521YQ bumped LLP LP5521YQ X bumped LLP NS Package Number ...
Page 4
Pin Descriptions LP5521TM Pin # Name SCL 1E SDA 2A VOUT 2B ADDR_SEL1 2C ADDR_SEL0 2D GPO CFLY2N 3B CFLY1N 3C GND 3D CLK_32K 3E INT 4A CFLY2P 4B CFLY1P ...
Page 5
Pin Descriptions LP5521YQ Pin # Name Type 1 CFLY2P 2 CFLY1P 3 VDD 4 GND 5 CLK_32K 6 INT OD/O 7 TRIG I/OD 8 N/C 9 N/C 10 N/C 11 N/C 12 N/C 13 SDA I/ SCL ...
Page 6
... Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. V OUT Voltage on Logic Pins Continuous Power Dissipation (Note 3) Junction Temperature (T ) J-MAX Storage Temperature Range Maximum Lead Temperature (Soldering) ESD Rating (Note 5) ...
Page 7
LED Driver Electrical Characteristics ( Outputs) Symbol Parameter pin leakage current LEAKAGE I Maximum Source Current MAX I Accuracy of output current OUT I Matching (Note 11) MATCH f LED PWM switching frequency LED ...
Page 8
... Note 3: Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages 130°C (typ.). Note 4: For detailed soldering specifications and information, please refer to National Semiconductor Application Note AN1112 : Micro SMD Wafer Level Chip Scale Package or AN1187 : Leadless Leadframe Package (LLP). ...
Page 9
Typical Performance Characteristics Unless otherwise specified 3.6V DD LED Drive Efficiency vs. Input Voltage Automatic Gain Change LED Current vs. Current Register Code Charge Pump Efficiency vs. Load Current LED Current vs. Output Pin Headroom Voltage 20186221 LED ...
Page 10
Charge Pump Output Voltage vs. Load Current Charge Pump Automatic Gain Change Hysteresis Charge Pump Load Transient Response in 1.5x Mode (0 to 25.5 mA) www.national.com Charge Pump Output Voltage vs. Input Voltage Automatic Gain Change from 1x to 1.5x ...
Page 11
Charge Pump Automatic Gain Change (LED V = 3.6V) Standby Current vs. Input Voltage F 20186216 11 20186217 www.national.com ...
Page 12
Block Diagram www.national.com 12 20186274 ...
Page 13
Modes of Operation RESET: In the RESET mode all the internal registers are reset to the default values. Reset is done always if Reset Register (0DH) is written FFH or internal Power On Reset is activated. Power On Reset (POR) ...
Page 14
Charge Pump Operational Description OVERVIEW The LP5521 includes a pre-regulated switched-capacitor charge pump with a programmable voltage multiplication of 1 and 1.5x. On 1.5x mode by combining the principles of a switched-ca- pacitor charge pump and a linear regulator, it ...
Page 15
LED Driver Operational Description The LP5521 LED drivers are constant current sources with 8- bit PWM control. Output current can be programmed with I register up to 25.5 mA. Current setting resolution is 100 μA (8-bit control). R driver has ...
Page 16
LED Controller Operation Modes Operation modes are defined in register address 01H. Each output channel ( operation mode can be configured Name R_MODE G_MODE B_MODE www.national.com Logarithmic and Linear PWM Adjustment Curves separately. MODE registers are synchronized to ...
Page 17
DISABLED Each channel can be configured to disabled mode. LED out- put current will be 0 during this mode. Disabled mode resets respective channel’s PC. LOAD Program LP5521 can store 16 commands for each channel (R, G, B). Each command ...
Page 18
DIRECT Control When channel mode is set to 00b, the LP5521 drivers work in direct control mode. LP5521 LED channels can be controlled independently through I nel there is a PWM control register and a output ...
Page 19
LED Controller Programming Commands LP5521 has three independent programmable channels (R, G, B). Trigger connections between channels are common for all channels. All channels have own program memories for storing complex patterns. Brightness control and patterns are done with 8-bit ...
Page 20
Application example: For example if following parameters are used for ramp: • Prescale = 1 => cycle time = 15.6 ms • Step time = 2 => time = 15 31.2 ms • Sign = 0 ...
Page 21
Name Value int reset X means do not care whether Trigger Wait or send triggers can be used to e.g. synchronize opera- tion between different channels. Send trigger command takes sixteen 32 kHz clock cycles and wait ...
Page 22
Power Save Mode Automatic power save mode PWRSAVE_EN bit in register address 08H is 1. Almost all analog blocks are powered down in power save, if external clock is used. Only charge pump protection circuits remain active. However if internal ...
Page 23
Logic Interface Operational Description LP5521 features a flexible logic interface for connecting to processor and peripheral devices. Communication is done with compatible interface and different logic input/output pins makes it possible to synchronize operation of several devices. ...
Page 24
Compatible Serial Bus Interface Interface Bus Overview The compatible synchronous serial interface provides ac- cess to the programmable functions and registers on the device. This protocol uses a two-wire interface for bidirec- tional communications ...
Page 25
Before any data is transmitted, the master transmits the ad- dress of the slave being addressed. The slave device should send an acknowledge signal on the SDA line, once it recog- nizes its address. The slave address is the first ...
Page 26
When a READ function accomplished, a WRITE function must precede the READ function, as show in the Read Cycle waveform w = write (SDA = read (SDA = 1) ack = acknowledge (SDA pulled ...
Page 27
Recommended External Components CAPACITOR SELECTION The LP5521 requires 4 external capacitors for proper opera μF, C tion ( OUT FLY1 FLY2 mount multi-layer ceramic capacitors are recommended. These capacitors are small, inexpensive and ...
Page 28
Program Load and Execution Example Startup Device and Configure Device to SRAM Write Mode: • Supply e.g. 3.6V to VDD • Supply e.g. 1. • Generate 32 kHz clock to CLK_32K pin • Write to address 00H 0100 ...
Page 29
Direct PWM Control Example Startup device: • Supply e.g. 3.6V to VDD • Supply e.g. 1. • Write to address 00H 0100 0000b (enable LP5521) • Wait 500 µs (start-up delay) Enable charge pump 1.5x mode and use ...
Page 30
www.national.com 30 ...
Page 31
Enable Register (ENABLE) Address 00H Reset value 00H 7 6 LOG_EN CHIP_EN R_EXEC[1] Name Bit Access LOG_EN 7 R/W CHIP_EN 6 R/W R_EXEC 5:4 R/W G_EXEC 3:2 R/W B_EXEC 1:0 R/W EXEC registers are synchronized to 32 kHz clock. Delay ...
Page 32
Operation Mode Register (OP MODE) Address 01H Reset value 00H 7 6 R_MODE[1] Name Bit Access R_MODE 5:4 R/W G_MODE 3:2 R/W B_MODE 1:0 R/W MODE registers are synchronized to 32 kHz clock. Delay between consecutive I longer than 153 ...
Page 33
B Channel PWM Control (B_PWM) Address 04H Reset value 00H 7 6 Name Bit Access Active B_PWM 7:0 R/W R Channel Current (R_CURRENT) Address 05H Reset Value AFH 7 6 Name Bit Access R_CURRENT 7:0 R/W B PWM Register 5 ...
Page 34
G Channel Current (G_CURRENT) Address 06H Reset Value AFH 7 6 Name Bit G_CURRENT 7:0 B Channel Current (B_CURRENT) Address 07H Reset value AFH 7 6 Name Bit B_CURRENT 7:0 www.national.com G CURRENT Register G_CURRENT[7:0] Access Active ...
Page 35
Configuration Control (CONFIG) Address 08H Reset value 00H 7 6 PWM_HF PWRSAVE_EN Name Bit PWM_HF 6 PWRSAVE_EN 5 CP_MODE 4:3 R_TO_BATT 2 CLK_DET_EN, 1:0 INT_CLK_EN R Channel Program Counter Value (R channel PC) Address 09H Reset value 00H 7 6 ...
Page 36
G Channel Program Counter Value (G channel PC) Address 0AH Reset value 00H 7 6 Name Bit Access G_PC 3:0 R/W PC registers are synchronized to 32 kHz clock. Delay between consecutive I μs (typ.). PC register can be read ...
Page 37
RESET Register Address 0DH Reset value 00H 7 6 RESET RESET RESET Name Bit Access RESET 7:0 W GPO Register Address 0EH Reset value 00H 7 6 Name Bit Access INT_AS_GPO 2 R/W GPO 1 R/W INT 0 R/W PROGRAM ...
Page 38
Physical Dimensions The dimension for X1 ,X2 and X3 are as given: X1=1.717 mm ± 0.03 mm X2=2.066 mm ± 0.03 mm X3=0.600 mm ± 0.075 mm www.national.com inches (millimeters) unless otherwise noted TMD20ECA: Thin microSMD-20, Small Bump YQA24A: Bumped ...
Page 39
Notes 39 www.national.com ...
Page 40
... For more National Semiconductor product information and proven design tools, visit the following Web sites at: Products Amplifiers www.national.com/amplifiers Audio www.national.com/audio Clock Conditioners www.national.com/timing Data Converters www.national.com/adc Displays www.national.com/displays Ethernet www.national.com/ethernet Interface www.national.com/interface LVDS www.national.com/lvds Power Management www.national.com/power Switching Regulators www.national.com/switchers LDOs www ...