LT1715 Linear Technology Corporation, LT1715 Datasheet

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LT1715

Manufacturer Part Number
LT1715
Description
Manufacturer
Linear Technology Corporation
Datasheet

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FEATURES
TYPICAL APPLICATIO
APPLICATIO S
UltraFast: 4ns at 20mV Overdrive
150MHz Toggle Frequency
Separate Input and Output Power Supplies
Low Power: 4.6mA per Comparator at 3V
Pinout Optimized for High Speed Use
Output Optimized for 3V and 5V Supplies
TTL/CMOS Compatible Rail-to-Rail Output
Input Voltage Range Extends 100mV
Below Negative Rail
Internal Hysteresis with Specified Limits
High Speed Differential Line Receivers
Level Translators
Window Comparators
Crystal Oscillator Circuits
Threshold Detectors/Discriminators
High Speed Sampling Circuits
Delay Lines
100MHz Dual Differential Line Receiver
IN A
IN B
–5V
5V
U
+
+
1715 TA01
U
3V
Independent Input/Output Supplies
OUT A
OUT B
DESCRIPTIO
The LT
for low voltage operation. Separate supplies allow inde-
pendent analog input ranges and output logic levels with
no loss of performance. The input voltage range extends
from 100mV below V
esis makes the LT1715 easy to use even with slow moving
input signals. The rail-to-rail outputs directly interface to
TTL and CMOS. The symmetric output drive results in
similar rise and fall times that can be harnessed for analog
applications or for easy translation to other single supply
logic levels.
The LT1715 is available in the 10-pin MSOP package. The
pinout of the LT1715 minimizes parasitic effects by plac-
ing the most sensitive inputs away from the outputs,
shielded by the power rails.
For a dual/quad single supply comparator with similar
propagation delay, see the LT1720/LT1721. For a single
comparator with similar propagation delay, see the LT1719.
UltraFast is a trademark of Linear Technology Corporation.
, LTC and LT are registered trademarks of Linear Technology Corporation.
CLOCK OUT
DATA OUT
®
1715 is an UltraFast
Dual Comparator with
3V
0V
3V
0V
Line Receiver Response to 100MHz Clock,
FET PROBES
50MHz Data Both with 25mV
U
EE
to 1.2V below V
5ns/DIV
TM
dual comparator optimized
4ns, 150MHz
P-P
CC
Inputs
. Internal hyster-
1715 TA02
LT1715
1V/DIV
1V/DIV
1

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LT1715 Summary of contents

Page 1

... The input voltage range extends from 100mV below V esis makes the LT1715 easy to use even with slow moving input signals. The rail-to-rail outputs directly interface to TTL and CMOS. The symmetric output drive results in ...

Page 2

... 5mV (Notes 10, 11) OVERDRIVE EE + – (Note 12) Between ORDER PART NUMBER TOP VIEW LT1715CMS LT1715IMS OUT A 7 OUT GND MS10 PACKAGE MS10 PART MARKING = 120 C/ W (NOTE 3) LTVQ JA LTVV = 1V 10pF 20mV, CM OUT ...

Page 3

... Overdrive is measured relative 3/32" Note 11 low values of overdrive. The LT1715 is 100% tested with a 100mV step and 20mV overdrive. Correlation tests have shown that t guaranteed with this test. Note 12: Propagation Delay Skew is defined as SKEW Note 13: Differential propagation delay is defined as the larger of the two: ...

Page 4

... LT1715 W U TYPICAL PERFOR A CE CHARACTERISTICS Input Offset and Trip Voltages vs Supply Voltage TRIP –1 – V TRIP – GND EE –3 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 SUPPLY VOLTAGE ( 1715 G01 Input Current vs Differential Input Voltage ...

Page 5

... G14 Response to 150MHz 25mV Sine Wave Driving 10pF NA 25mV P-P 5V OUT A 0V FET PROBES 2.5ns/DIV – 1715 G17 LT1715 = 100mV = 10pF V = GND –5V EE 5.0 5.5 6 (V) CC 1715 G12 5 6 1715 G15 P-P 20mV/DIV 1V/DIV 1715 G18 ...

Page 6

... B (Pin 4): Noninverting Input of Comparator B. V (Pin 5): Negative Supply Voltage for Input Stage and EE Substrate. TEST CIRCUITS BANDWIDTH-LIMITED TRIANGLE WAVE ~ 1kHz 0.1 F 50k + DUT 50 1/2 LT1715 50 – 200k V CM 1/2 LT1638 100k 100k + – + 100k – 100k 1/2 LT1638 0.15 F NOTES: LT1638, LT1112, LTC203s ARE POWERED FROM 15V. ...

Page 7

... U APPLICATIO S I FOR ATIO Power Supply Configurations The LT1715 has separate supply pins for the input and output stages that allow flexible operation, accommodat- ing separate voltage ranges for the analog input and the output logic. Of course, a single 3V/5V supply may be used ...

Page 8

... However, with the 2V/ns slew rate of the LT1715 outputs, a 4mV step can be created at a 100 input source with only 0.02pF of output to input coupling. The LT1715’s pinout has been arranged to minimize problems by placing the sensitive inputs away from the outputs, shielded by the power rails ...

Page 9

... The ground trace from Pin 6 runs under the device up to the bypass capacitor, shielding the inputs from the outputs. Note the use of a common via for the LT1715 and the bypass capacitors, which minimizes interference from high frequency energy running around the ground plane or power distribution traces ...

Page 10

... EE dependence of the hysteresis voltage. Additional hysteresis may be added externally. The rail-to- rail outputs of the LT1715 make this more predictable than with TTL output comparators due to the LT1715’s small variability add additional hysteresis, set up positive feedback by ...

Page 11

... U R1 may also be required. Note that the currents through the R1/R2 bias string should be many times the input currents of the LT1715. For 5% accuracy, the current must be at least 20 times the input current, more for higher accuracy. Interfacing the LT1715 to ECL The LT1715’s comparators can be used in high speed ...

Page 12

... ECL with the LT1715. Resistor values are given for both ECL interface types and for both a 5V and 3V LT1715 supply rail. Again, a fourth resistor needed to prevent the low state current from flowing out of the LT1715, turning on the internal ESD/substrate diodes. ...

Page 13

... PECL design (AN1406), all from Motorola, now ON Semiconductor. Circuit Description The block diagram of the LT1715 is shown in Figure 9. The circuit topology consists of a differential input stage, a gain stage with hysteresis and a complementary com- mon-emitter output stage. All of the internal signal paths utilize low voltage swings for high speed at low power ...

Page 14

... Because the propagation delay (t definition ends at the time the output voltage is halfway between the supplies, the fixed slew current makes the LT1715 faster at 3V than 5V with large capacitive loads and sufficient input overdrive. Another manifestation of this output speed limit is skew, + – ...

Page 15

... APPLICATIO S I FOR ATIO V Test Circuit TRIP The input trip points test circuit uses a 1kHz triangle wave to repeatedly trip the comparator being tested. The LT1715 output is used to trigger switched capacitor sampling of the triangle wave, with a sampler for each direction PLIFIED SCHE ATIC ...

Page 16

... With small input signals, the hysteresis and dispersion make the LT1715 act like a comparator with a 12mV hysteresis span. In other words, a 12mV 10MHz will barely toggle the LT1715, with 90 of phase lag or 25ns additional delay. Above 5V P-P crease due to internal capacitive feed-forward in the input stage ...

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