LTC1090 Linear Technology, LTC1090 Datasheet
LTC1090
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LTC1090 Summary of contents
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... The LTC1090A is specified with total unadjusted error (including the effects of offset, linearity and gain errors) less than ±0.5LSB. The LTC1090 is specified with offset and linearity less than ±0.5LSB but with a gain error limit of ±2LSB for applications where gain is adjustable or less critical. ...
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... Inputs .................................... (V Digital Inputs ......................................... –0.3V to 12V Digital Outputs .............................. – 0. Power Dissipation .............................................. 500mW Operating Temperature Range LTC1090AC/LTC1090C ........................–40°C to 85°C LTC1090AM/LTC1090M (OBSOLETE) ...... –55°C to 125°C Storage Temperature Range ................. – 65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300° RECO ...
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... MAX MIN TYP MAX ±0.5 ±0.5 ±0.5 ±0.5 ±1.0 ±2.0 ±1 – – 0.05V to V 0.05V –1 –1 –1 – LTC1090/LTC1090A MIN TYP MAX 250 450 140 300 ns 150 400 300 ns 60 300 UNITS ...
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... ACLK falling edges after a chip select falling edge is detected before responding to control input signals. Therefore, no attempt should be made to clock an address in or data out until the minimum chip select setup time has elapsed. The denotes specifications which apply LTC1090/LTC1090A MIN TYP MAX UNITS 2.0 ...
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... Delay Time, t OUT SCLK 0.8V t dDO 2.4V D OUT 0.4V Rise and Fall Times, t OUT 2.4V D OUT 0. LTC1090 • TC02 dis 2.0V 90% t dis 10% LTC1090 • TC03 Load Circuit for and t dDO TEST POINT OUT 100pF LTC1090 • TC05 dDO , 1090fc 5 ...
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... This supply must be kept free of noise and ripple by bypassing directly to the analog ground plane. SAMPLE AND HOLD COMP 10-BIT CAPACITIVE DAC – REF – AGND 18 SCLK OUTPUT 16 SHIFT D OUT REGISTER 10-BIT SAR 19 ACLK 14 CONTROL REF + 15 AND CS TIMING LTC1090 • BD01 1090fc ...
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... LTC1090 • TPC08 LTC1090 Reference Current vs Temperature 0 REF 0.5 0.4 0.3 0.2 0.1 0 –50 – 100 125 AMBIENT TEMPERATURE, T (°C) A LTC1090 • TPC03 Change in Gain Error vs Reference Voltage 1. 1.0 0.75 0.5 0. REFERENCE VOLTAGE, V (V) REF LTC1090 • TPC06 Change in Gain Error vs Supply Voltage ...
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... CYCLE TIME, t (µs) CYC LTC1090 • TPC17 **MAXIMUM R REPRESENTS THE FILTER RESISTOR VALVE AT WHICH A 0.1LSB SHIFT FILTER CHANGE IN FULL SCALE ERROR FROM ITS VALUE AT R FILTER = 0 IS FIRST DETECTED. Change in Gain Error vs Temperature 0 ...
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... SUPPLY VOLTAGE, V (V) CC LTC1090 • TPC19 U U APPLICATIO S I FOR ATIO The LTC1090 is a data acquisition component which contains the following functional blocks: 1. 10-bit successive approximation capacitive A/D converter 2. Analog multiplexer (MUX) 3. Sample and hold (S/H) 4. Synchronous, full duplex serial interface 5. Control and timing logic ...
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... Transfer Transfer Conversion 2. Input Data Word The LTC1090 8-bit input data word is clocked into the D input on the first eight rising SCLK edges after chip select is recognized. Further inputs on the D ignored until the next CS cycle. The eight bits of the input word are defined as follows: ...
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... LTC1090 • AI04A 4,5 6,7 Figure 1. Examples of Multiplexer Options on the LTC1090 Unipolar/Bipolar (UNI) The fifth input bit (UNI) determines whether the conver- sion will be unipolar or bipolar. When UNI is a logical one, a unipolar conversion will be performed on the selected ...
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... Deglitcher 0.0098V 0V A deglitching circuit has been added to the Chip Select –0.0098V input of the LTC1090 to minimize the effects of errors –0.0195V • caused by noise on that input. This circuit ignores changes • in state on the CS input that are shorter in duration than 1 • ...
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... Timing with Different Word Lengths OUT) LTC1090 t CONV 8 THE LAST TWO BITS ARE TRUNCATED LTC1090 • AI08A t CONV (SB LTC1090 • AI08B t CONV 10 12 FILL B1 B0 ZEROES (SB LTC1090 • AI08C t CONV 16 FILL ZEROES * * * * * * LTC1090 • AI08D 1090fc 13 ...
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... In the normal mode of operation brought high during the conversion time (see Figure 3). The serial port ignores any SCLK activity while CS is high. The LTC1090 will also operate with CS low during the conversion. In this mode, SCLK must remain low during the conversion as shown in Figure 4 ...
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... The COP420 transfers data MSB first and in 4-bit incre- ments (nibbles). This is easily accommodated by setting the LTC1090 to MSB first format and 12-bit word length. The data output word is then received by the COP420 in three 4-bit blocks with the final two unused bits filled with zeroes by the LTC1090 ...
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... LSB first format. The 10-bit output data is received by the processor as two 8-bit bytes, LSB first. The LTC1090 fills the final 6 unused bits (after the MSB) with zeroes in unipolar mode and with the sign bit in bipolar mode. ...
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... D line. An example is made of the OUT Intel 8051/8052/80C252 family. Intel 8051 To interface to the 8051, the LTC1090 is programmed for MSB first format and 10-bit word length. The 8051 gener- ates CS, SCLK and D on three port lines and reads the fourth ...
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... Figure 5). In this case, the CS signals decide which LTC1090 is being addressed by the MPU. ANALOG CONSIDERATIONS 1. Grounding The LTC1090 should be used with an analog ground plane and single point grounding techniques. Pin 11 (AGND) should be tied directly to this ground plane. Pin 10 (DGND) can also be tied directly to this ground plane because minimal digital noise is generated within the chip itself ...
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... Source Resistance The analog inputs of the LTC1090 look like a 60pF capaci- tor ( series with a 500Ω resistor (R IN Figure 9. C gets switched between the selected “ ...
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... Sample-and-Hold (e.g., 1µF), the F Single Ended Inputs The LTC1090 provides a built-in sample and hold (S&H) function for all signals acquired in the single ended mode (COM pin grounded). This sample and hold allows the and is roughly propor- LTC1090 to convert rapidly varying signals (see typical curve of S& ...
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... ACLK = 2MHz, its peak value would have to be 150mV. 5. Reference Inputs The voltage between the reference inputs of the LTC1090 defines the voltage span of the A/D converter. The refer- ence inputs look primarily like a 10kΩ resistor but will have transient capacitive switching currents due to the switched capacitor conversion technique (see Figure 14) ...
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... V used. This is shown in the typical curve of Maximum Conversion Clock Rate vs Reference Voltage. Offset with Reduced V REF The offset of the LTC1090 has a larger effect on the output code when the A/D is operated with reduced reference voltage. The offset (which is typically a fixed voltage) becomes a larger fraction of an LSB as the size of the LSB is reduced ...
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... V IN – SNEAK-A-BIT is a trademark of Linear Technology Corp. SNEAK-A-BIT The LTC1090’s unique ability to software select the polar- + ity of the differential inputs and the output word length is and used to achieve one more bit of resolution. Using the circuit below with two conversions and some software, a 2’ ...
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... JSR READ–/+ Read CH7 with respect to CH6 JSR CHK SIGN Determines which reading has valid data, converts to 2’s complement and stores in RAM 24 Sneak-A-Bit Code for the LTC1090 Using the MC68HC05C4 V IN MNEMONIC 5V READ–/+: LDA SOFTWARE 2047 STEPS 0V READ+/– ...
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... RAD TYP 0.005 (0.127) MIN 0.015 – 0.060 (0.381 – 1.524) 0° – 15° 0.125 (3.175) MIN OBSOLETE PACKAGE LTC1090 1.060 (26.924) MAX 0.200 (5.080) MAX 0.045 – ...
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... LTC1090 PACKAGE DESCRIPTIO 0.300 – 0.325 (7.620 – 8.255) 0.009 – 0.015 (0.229 – 0.381) +0.035 0.325 –0.015 +0.889 8.255 –0.381 *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm Package 20-Lead PDIP (Narrow ...
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... LTC DWG # 05-08-1620 NOTE 0.093 – 0.104 45 (2.362 – 2.642) 0 – 8 TYP 0.050 (1.270) BSC 0.014 – 0.019 (0.356 – 0.482) TYP LTC1090 0.496 – 0.512* (12.598 – 13.005 0.394 – 0.419 (10.007 – 10.643 0.037 – ...
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... No Latency ∆Σ trademark of Linear Technology Corporation. Linear Technology Corporation 28 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 FAX: (408) 434-0507 COMMENTS Pin-Compatible with LTC1090 Low R , Low Power, 16-Pin SO and SSOP Package ON Low Power, Small Size 5V, Programmable MUX and Sequencer 3V or 5V, Programmable MUX and Sequencer ...