LTC1092 LINER [Linear Technology], LTC1092 Datasheet

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LTC1092

Manufacturer Part Number
LTC1092
Description
1-, 2-, 6- and 8-Channel, 10-Bit Serial I/O Data Acquisition Systems
Manufacturer
LINER [Linear Technology]
Datasheet

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FEATURES
TYPICAL
DESCRIPTIO
The LTC
acquisition systems are designed to provide complete
function, excellent accuracy and ease of use when digitiz-
ing analog data from a wide variety of signal sources and
transducers. Built around a 10-bit, switched capacitor,
successive approximation A/D core, these devices include
software configurable analog multiplexers and bipolar and
unipolar conversion modes as well as on-chip sample-
Programmable Features
– Unipolar/Bipolar Conversions
– Differential/Single-Ended Multiplexer
Sample-and-Holds
Single Supply 5V, 10V or 5V Operation
Direct 3- or 4-Wire Interface to Most MPU Serial
Ports and All MPU Parallel I/O Ports
Analog Inputs Common Mode to Supply Rails
Resolution: 10 Bits
Total Unadjusted Error (A Grade): 1LSB Over Temp
Fast Conversion Time: 20 s
Low Supply Current
ANALOG INPUT #1
ANALOG INPUT #2
0V TO 5V RANGE
0V TO 5V RANGE
Configurations
LTC1091: 3.5mA Max, 1.5mA Typ
LTC1092/LTC1093/LTC1094: 2.5mA Max, 1mA Typ
®
1091/LTC1092/LTC1093/LTC1094 10-bit data
APPLICATION
1
2
3
4
CS
CH0
CH1
GND
U
LTC1091
(V
D
REF
CLK
V
OUT
D
CC
IN
)
8
7
6
5
5V
U
SERIAL DATA LINK
4.7 F
APPLICATIONS INFORMATION
Serial I/O Data Acquisition Systems
FOR 8051 CODE SEE
P1.4
P1.3
P1.2
SECTION
(e.g., 8051)
MPU
1-, 2-, 6- and 8-Channel, 10-Bit
and-holds. On-chip serial ports allow efficient data trans-
fer to a wide range of microprocessors and microcontrol-
lers. These circuits can provide a complete data acquisi-
tion system in ratiometric applications or can be used with
an external reference in others.
The high impedance analog inputs and the ability to
operate with reduced spans (below 1V full scale) allow
direct connection to sensors and transducers in many
applications, eliminating the need for gain stages.
An efficient serial port communicates without external
hardware to most MPU serial ports and all MPU parallel
I/O ports allowing eight channels of data to be transmitted
over as few as three wires. This, coupled with low power
consumption, makes remote location possible and facili-
tates transmitting data through isolation barriers.
Temperature drift of offset, linearity and full-scale error
are all extremely low (1ppm/ C typically) allowing all
grades to be specified with offset and linearity errors of
grade devices are specified with full-scale error and total
unadjusted error (including the effects of offset, linearity
and full-scale errors) of 1LSB maximum over tempera-
ture. The lower grade has a full-scale specification of
less critical.
0.5LSB maximum over temperature. In addition, the A
2LSB for applications where full scale is adjustable or
, LTC and LT are registered trademarks of Linear Technology Corporation.
1091 TA01
1.25
1.00
0.75
0.50
0.25
0
0
LTC1093/LTC1094
LTC1091/LTC1092
V
CC
= 5V
1
REFERENCE VOLTAGE (V)
2
3
4
1091 TA02
5
1

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LTC1092 Summary of contents

Page 1

... Analog Inputs Common Mode to Supply Rails Resolution: 10 Bits Total Unadjusted Error (A Grade): 1LSB Over Temp Fast Conversion Time Low Supply Current LTC1091: 3.5mA Max, 1.5mA Typ LTC1092/LTC1093/LTC1094: 2.5mA Max, 1mA Typ U DESCRIPTIO ® The LTC 1091/LTC1092/LTC1093/LTC1094 10-bit data acquisition systems are designed to provide complete ...

Page 2

... CH7 8 COM 9 DGND 10 T JMAX REDUCED SPAN CAPABILITY BIPOLAR (SEPARATE V ) REF ORDER PART TOP VIEW NUMBER CLK LTC1092ACN8 6 D LTC1092CN8 OUT 5 V REF N8 PACKAGE 8-LEAD PDIP = 110 C, = 150 C/W (N) JA TOP VIEW LTC1094ACN LTC1094CN CLK OUT ...

Page 3

... 400 0 LTC1091 15 LTC1092 12 LTC1093/LTC1094 18 LTC1091A/LTC1092A LTC1093A/LTC1094A MIN TYP 5 10 – – 0.05V to V LTC1091/LTC1092 LTC1093/LTC1094 MAX UNITS 10 0 0.5 CLK Cycles CLK Cycles CLK Cycles = 25 C. (Note 3) A LTC1091/LTC1092 LTC1093/LTC1094 MAX MIN TYP MAX UNITS 0 ...

Page 4

... Note 2: All voltage values are with respect to ground with DGND, AGND, – GND and REF wired together (unless otherwise noted). REF connected to the AGND pin on the LTC1093. DGND, AGND, REF are internally connected to the GND pin on the LTC1091/LTC1092. + – – Note 3: V ...

Page 5

... SUPPLY VOLTAGE (V) 1091/2/3/4 G08 **AS THE CLK FREQUENCY IS DECREASED FROM 500kHz, MINIMUM CLK FREQUENCY ( ERROR 0.1LSB) REPRESENTS THE FREQUENCY AT WHICH A 0.1LSB SHIFT IN ANY CODE TRANSITION FROM ITS 500kHz VALUE IS FIRST DETECTED. LTC1091/LTC1092 LTC1093/LTC1094 Change in Full-Scale Error vs Temperature 0 REF ...

Page 6

... C A 1.00 0.75 0.50 R SOURCE “+” OR “–” INPUT 100 1k 10k SOURCE 1091/2/3/4 G10 LTC1091/LTC1092 Input Channel Leakage Current vs Temperature 100 ON-CHANNEL OR OFF-CHANNEL – –25 0 100 125 AMBIENT TEMPERATURE ( C) 1091/2/3/4 G13 LTC1091 Change in Full-Scale Error vs Supply Voltage ...

Page 7

... Supply Current vs Supply Voltage 6 V OPEN REF f = 500kHz CLK SUPPLY VOLTAGE (V) LTC1091/LTC1092 LTC1093/LTC1094 LTC1092/LTC1093/LTC1094 Change in Full-Scale Error vs Reference Voltage 1. 1.00 0.75 0.50 0. REFERENCE VOLTAGE (V) 1092/2/3/4 G20 LTC1092/LTC1093/LTC1094 Linearity Error vs Supply Voltage 1.25 V ...

Page 8

... REF 75 100 125 1091/2/3/4 G28 V (Pin 8 )(LTC1092): Positive Supply Voltage. This pin CC provides power to the A/D converter. It must be kept free of noise and ripple by bypassing directly to the analog ground plane. LTC1093/LTC1094 CH0 to CH5/CH0 to CH7 (Pins 1 to 6/Pins 1 to 8): Analog Inputs. The analog inputs must be free of noise with respect to AGND ...

Page 9

... AV DV should be tied together on the LTC1094 SAMPLE- AND-HOLD COMP 10-BIT CAPACITIVE DAC – + REF AGND REF LTC1091/LTC1092 LTC1093/LTC1094 and CC 18 CLK OUTPUT 16 D SHIFT OUT REGISTER 10-BIT SAR CONTROL 17 CS AND TIMING 1091/2/3 ...

Page 10

... LTC1091/LTC1092 LTC1093/LTC1094 TEST CIRCUITS On- and Off-Channel Leakage Current OFF A POLARITY Voltage Waveforms for D Delay Time, t OUT CLK 0.8V t dDO D OUT Load Circuit for t dis TEST POINT 3k D OUT 100pF LTC1091 CLK D OUT 10 ON-CHANNEL OFF- CHANNELS 1091/2/3/4 TC01 Voltage Waveforms for D ...

Page 11

... After one null bit, the result of the conversion is output on the D data exchange, CS should be brought high. This resets the LTC1091/LTC1093/LTC1094 in preparation for the next data exchange. The LTC1092 does not require a configuration input word and has no D shown in the LTC1092 Operating Sequence. After CS falls, LTC1091/LTC1092 LTC1093/LTC1094 ...

Page 12

... RESULT OUT the first CLK pulse enables D . After one null bit, the A/D OUT conversion result is output on the D high resets the LTC1092 for the next data exchange. 2. Input Data Word The LTC1092 requires no D word permanently IN configured to have a single differential input and to operate in unipolar mode ...

Page 13

... LSB-First Data (MSBF = 0) CS CLK SEL1 START UNI D IN MSBF SGL/ ODD/ SEL0 Hi-Z Hi-Z DIFF SIGN D OUT t SMPL W U LTC1092 Operating Sequence t CYC LTC1093/LTC1094 Operating Sequence + – , CH5 ), Unipolar Mode t CYC DON’T CARE CONV t CYC DON’T CARE ...

Page 14

... LTC1091/LTC1092 LTC1093/LTC1094 PPLICATI S I FOR ATIO Start Bit The first “logical one” clocked into the D goes low is the start bit. The start bit initiates the data transfer. The LTC1091/LTC1093/LTC1094 will ignore all leading zeros which precede this logical one. After the start bit is received, the remaining bits of the input word will be clocked in ...

Page 15

... When UNI is a logical zero, a bipolar conversion will result. The input span and code assign- ment for each conversion type are shown in the figures below. The LTC1091/LTC1092 are permanently configured for unipolar mode ...

Page 16

... LTC1091/LTC1092 LTC1093/LTC1094 PPLICATI FOR ATIO 3. Accommodating Microprocessors with Different Word Lengths The LTC1091/LTC1093/LTC1094 will fill zeros indefinitely after the transmitted data until CS is brought high. At that time the D line is disabled. This makes interfacing easy OUT to MPU serial ports with different transfer increments including 4 bits (e ...

Page 17

... Table 1 MPU without a dedicated serial port is used, then three or four of the MPU’s parallel port lines can be programmed to form the serial link to the LTC1091/ LTC1092/LTC1093/LTC1094. Included here are one serial interface example and one example showing a parallel port programmed to form the serial interface. ...

Page 18

... LTC1091/LTC1092 LTC1093/LTC1094 PPLICATI S I FOR ATIO Motorola SPI (MC68HC05C4, MC68HC11) The MC68HC05C4 has been chosen as an example of an MPU with a dedicated serial port. This MPU transfers data MSB first and in 8-bit increments. With two 8-bit transfers, the A/D result is read into the MPU. The first 8-bit transfer ...

Page 19

... MSBF BIT LATCHED INTO LTC1091 MSBF LTC1091 SENDS A/D RESULT LTC1091 TAKES CONTROL OF DATA LINE ON 4TH FALLING CLK LTC1091/LTC1092 LTC1093/LTC1094 COMMENTS A, #FFH D Word for LTC1091 IN P1.4 Make Sure CS Is High P1.4 CS Goes Low R4, #04 Load Counter A Rotate D Bit into Carry IN P1 ...

Page 20

... The LTC1091/LTC1092/LTC1093/LTC1094 should be used with an analog ground plane and single point grounding techniques. The AGND pin (GND on the LTC1091/LTC1092) should be tied directly to this ground plane. The DGND pin of the LTC1093/LTC1094 can also be tied directly to this ground plane because minimal digital noise is generated within the chip itself ...

Page 21

... Source Resistance The analog inputs of the LTC1091/LTC1092/LTC1093/ LTC1094 look like a 60pF capacitor (C 500 resistor ( shown in Figure switched between the selected “ ...

Page 22

... LTC1091/LTC1092 LTC1093/LTC1094 PPLICATI S I FOR ATIO “–” Input Settling At the end of the sample phase the input capacitor switches to the “–” input and the conversion starts (see Figure 8). During the conversion, the “+” input voltage is effectively “ ...

Page 23

... MSBF bit is shifted in and continues until the falling CLK edge after the MSBF bit is 1091-4 F10 received. On this falling edge, the S&H goes into hold mode and the conversion begins. (e.g., 1 F), the LTC1091/LTC1092 LTC1093/LTC1094 time as shown in Figure 8. The sampling SMPL FILTER V “ ...

Page 24

... Reference Inputs The voltage between the reference inputs of the LTC1091/LTC1092/LTC1093/LTC1094 defines the volt- age span of the A/D converter. The reference inputs look primarily like a 10k resistor but will have transient capaci- tive switching currents due to the switched capacitor conversion technique (see Figure 12) ...

Page 25

... U 5V reference becomes 0.5LSB with a 1V reference and 2.5LSBs with a 0.2V reference. If this offset is unaccept- able, it can be corrected digitally by the receiving system or by offsetting the “–” input to the LTC1092/LTC1093/ LTC1094. Noise with Reduced V The total input-referred noise of the LTC1092/LTC1093/ LTC1094 can be reduced to approximately 200 V peak-to- ...

Page 26

... LTC1091/LTC1092 LTC1093/LTC1094 O U TYPICAL A PPLICATI 500 C Furnace Exhaust Gas Temperature Monitor with Low Supply Detection – LT1025A J TYPE GND COMMON 0 0. 0.1 F 20k LTC1052 8 2 – 10k 0.1 F 0.33 F 3.4k 178k 1% 0. OUT ...

Page 27

... OR EQUIVALENT – 125 C Thermometer Using Current Output Silicon Sensors 9V 4 LT1019-2.5 LM134 OR OTHER SENSOR LTC1092 SCLK – D OUT 11.5k GND V REF LTC1091/LTC1092 LTC1093/LTC1094 5V 4 MCU + LT1006 – 1091-4 TA04 OUT 3 TO MCU 1091 TA05 27 ...

Page 28

... LTC1091/LTC1092 LTC1093/LTC1094 PACKAGE DESCRIPTIO 0.300 – 0.325 (7.620 – 8.255) 0.009 – 0.015 (0.229 – 0.381) +0.035 0.325 –0.015 +0.889 8.255 –0.381 *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm Dimensions in inches (millimeters) unless otherwise noted. ...

Page 29

... MIN 0.125 0.100 (3.175) (2.54) MIN BSC LTC1091/LTC1092 LTC1093/LTC1094 0.770* (19.558) MAX 0.045 – 0.065 0.065 (1.651) TYP 0.018 0.003 (0.457 0.076) N16 1098 ...

Page 30

... LTC1091/LTC1092 LTC1093/LTC1094 PACKAGE DESCRIPTIO 0.300 – 0.325 (7.620 – 8.255) 0.009 – 0.015 (0.229 – 0.381) +0.035 0.325 –0.015 +0.889 8.255 –0.381 *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm Dimensions in inches (millimeters) unless otherwise noted. ...

Page 31

... DWG # 05-08-1620 NOTE 1 1 0.093 – 0.104 45 (2.362 – 2.642) 0 – 8 TYP 0.050 (1.270) BSC 0.014 – 0.019 (0.356 – 0.482) LTC1091/LTC1092 LTC1093/LTC1094 0.398 – 0.413* (10.109 – 10.490 0.394 – 0.419 (10.007 – 10.643 ...

Page 32

... TO ADDITIONAL LTC1094s 300 4N28 10k 2N3904 ISOLATION 4N28 BARRIER NC COMMENTS Serial I/O, 1.5mA Supply Current Pin Compatible Upgrades to LTC1091/LTC1092 Pin Compatible Upgrades to LTC1093/LTC1094 5V 10k 2N3906 C1 150 5V 10k SCK 150 5V 10k C0 150 TO 68HC05** 5V 10k MOSI 150 5.1k ...

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