LTC1553 Linear Technology Corporation, LTC1553 Datasheet
LTC1553
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LTC1553 Summary of contents
Page 1
... The LTC1553 uses a synchro- nous switching architecture with two external N-channel output devices, providing high efficiency and eliminating the need for a high power, high cost P-channel device ...
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... COMP = Open (Note INFORMATION TOP VIEW ORDER PART NUMBER OUTEN 3 VID0 18 LTC1553CG 4 17 VID1 LTC1553CSW 5 16 VID2 6 VID3 VID4 8 13 PWRGD 9 FAULT PACKAGE 20-LEAD PLASTIC SO = 125 C, = 100 125 C, ...
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... Note 9: Under typical soft current limit, the net soft start discharge current will [–10 A(I SSIL current ratio is designed to be 6:1. Note 10: When VID0 to VID4 are all HIGH, the LTC1553 will be forced to shut down internally. The OUTEN trip voltages are guaranteed by design for all other input codes. LTC1553 MIN ...
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... LTC1553 W U TYPICAL PERFORMANCE CHARACTERISTICS Typical 2.8V V Distribution OUT 140 TOTAL SAMPLE SIZE = 1500 120 100 100 2.775 2.785 2.795 2.805 2.815 2.825 OUTPUT VOLTAGE (V) 1553 G01 Line Regulation 2.825 REFER TO TYPICAL APPLICATION 2.820 CIRCUIT FIGURE 1 OUTPUT = NO LOAD 2.815 ...
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... IMAX IFB SS CAP = 0.01 F 1.5 1.0 SHORT-CIRCUIT CURRENT 0 OUTPUT CURRENT (A) 1553 G17 LTC1553 Soft Start Source Current vs Temperature – 7 – 8 – 9 –10 –11 –12 –13 – 50 – 100 TEMPERATURE ( C) 1553 G12 V Shutdown Supply Current CC vs Temperature ...
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... In hard current limit, the soft start capacitor will be forced low immedi- ately and the LTC1553 will rerun a complete soft start cycle. C must be selected such that during power-up the SS current through Q1 will not exceed the current limit value ...
Page 7
... OT trips. As OUTEN drops below 1.7V, the drivers are internally disabled to prevent the MOSFETs from heating further. If OUTEN is less than 1.2V for longer than 30 s, the LTC1553 will enter shutdown mode. The internal n oscillator can be synchronized to a faster external clock by applying the external clocking signal to the OUTEN pin. ...
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... PWRGD G1 LTC1553 FAULT I MAX OT G2 COMP SS SGND GND SENSE NC Figure 12V + 0 RISE/FALL 5000pF LTC1553 G2 G2 RISE/FALL 5000pF SGND GND Figure 1200 F 10k † Q1 15A V NC OUT MAX + † ...
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... With external pull-up resistor † 1 Disabled (1.70) ** With respect to the output voltage selected in Table 3 as required by † 0 Disabled (1.75) Intel Specification VRM 8.2 † These code selections are disabled in LTC1553 X Don’t care LTC1553 INPUT PIN RATED OUTPUT VOLTAGE ( ID3 ID2 ID1 ...
Page 10
... OT will trip, issuing a warning to the external CPU. If the temperature continues to rise and the OUTEN input drops to 1.7V, the G1 and G2 pins will be forced low. If OUTEN is pulled below 1.2V, the LTC1553 will go into shutdown mode, cutting the supply current to a minimum. If thermal shutdown is not required, OUTEN can be con- nected to a conventional TTL enable signal ...
Page 11
... During start-up, the COMP pin is clamped to a diode drop above the voltage at the SS pin. This prevents the error amplifier, ERR, from forcing the loop to maxi- mum duty cycle. The LTC1553 will begin to operate at low duty cycle as the SS pin rises above about 1.2V (V 1.8V continues to rise amplifier begins to regulate the output ...
Page 12
... COMP and SS to ground internally and turns Q1 and Q2 off. OT and PWRGD are pulled low, and FAULT is left floating. In shutdown, the LTC1553 quiescent current will drop to about 130 A. The remaining current is used to keep the thermistor sensing circuit at OUTEN alive. Note that the leakage current of ...
Page 13
... G1 first goes high. Power MOSFETs Two N-channel power MOSFETs are required for most LTC1553 circuits. They should be selected based prima- rily on threshold and on-resistance considerations. The required MOSFET threshold should be determined based on the available power supply voltages and/or the com- plexity of the gate driver charge pump scheme ...
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... SO-8) or Siliconix SUD50N03 or Motorola MTD20N03HDL (both in D PAK) are small footprint sur- face mount devices with R of gate drive that work well in LTC1553 circuits. With higher output voltages, the R significantly lower than that for Q2. These conditions can often be met by paralleling two MOSFETs for Q1 and using a single device for Q2 ...
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... To minimize this effect, the inductor value should usually be in the range for most typical 5V input LTC1553 circuits. To optimize performance, different combinations of input and output voltages and expected loads may require different inductor values ...
Page 16
... Low cost, generic tantalums are known to have very short lives followed by explosive deaths in switching power supply applications. AVX TPS series surface mount devices are popular surge tested tantalum capacitors that work well in LTC1553 applications. A common way to lower ESR and raise ripple current capability is to parallel several capacitors. A typical LTC1553 ...
Page 17
... PWM modulator and the gain of the error amplifier (g to frequency compensation can be used, the added respectively. )(C1) C Figure 10b. Bode Plot of the LTC1553 Overall Transfer Function LTC1553 = 12f , and the attenuation due the LC ...
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... Once PWRGD goes low, the internal circuitry watches for the output voltage to exceed 115% of the rated voltage. If this happens, FAULT will be triggered. Once FAULT is triggered, G1 and G2 will be forced low immedi- ately and the LTC1553 will remain in this state until V power supply is recycled or OUTEN is toggled ...
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... Do not connect these parts to the ground plane! 4. The V CC close to the LTC1553 as possible. The 10 F bypass capacitors shown at V optimum regulation performance. 5. The (+) plate of C " ...
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... F 3 GND + SGND 0 SENSE R IMAX 7 I MAX R IFB COMP 0 Figure 12. LTC1553 Layout Diagram 20 LTC1553 G1 19 OUTEN 18 VID0 VID0 17 VID1 VID1 5.6k 16 VID2 VID2 5.6k 15 VID3 VID3 14 5.6k VID4 VID4 13 PWRGD 12 FAULT 11 OT 1153 F12 ...
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... U U APPLICATIONS INFORMATION 5.6k 5.6k PENTIUM II SYSTEM 5 5V 1.8k C1 DALE 150pF NTHS-1206N02 MOUNT THERMISTER IN CLOSE THERMAL PROXIMITY TO Q1 Figure 13. Single Supply LTC1553 5V to 1.8V-3.5V Application with Thermal Monitor 0 2.7k 5. MAX CC PWRGD FAULT OT LTC1553 VID0 TO VID4 OUTEN COMP SS SGND GND SENSE ...
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... LTC1553 PACKAGE DESCRIPTION 0.205 – 0.212** (5.20 – 5.38) 0.005 – 0.009 0.022 – 0.037 (0.13 – 0.22) (0.55 – 0.95) * DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE ** DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE ...
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... DWG # 05-08-1620 NOTE 0.093 – 0.104 45 (2.362 – 2.642) 0 – 8 TYP 0.050 (1.270) TYP 0.014 – 0.019 (0.356 – 0.482) TYP LTC1553 0.496 – 0.512* (12.598 – 13.005 0.394 – 0.419 (10.007 – 10.643 0.037 – ...
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... McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 FAX: (408) 434-0507 TELEX: 499-3977 www.linear-tech.com 1N5817 10 1N5248B 0.1 F 18V MAX PWRGD FAULT LTC1553 FB VID0 TO VID4 OUTEN G2 COMP SGND GND SENSE 0 0.1 F COMMENTS Dual Version of LTC1148 Synchronous, V Synchronous, V Synchronous, V Synchronous N- or P-Channel FETs, Comparator/Low-Battery Detector ...