LTC1746 LINER [Linear Technology], LTC1746 Datasheet

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LTC1746

Manufacturer Part Number
LTC1746
Description
Low Power,14-Bit, 25Msps ADC
Manufacturer
LINER [Linear Technology]
Datasheet

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APPLICATIO S
FEATURES
BLOCK DIAGRA
, LTC and LT are registered trademarks of Linear Technology Corporation.
Telecommunications
Medical Imaging
Receivers
Base Stations
Spectrum Analysis
Imaging Systems
Sample Rate: 25Msps
77.5dB SNR and 91dB SFDR (3.2V Range)
74dB SNR and 96dB SFDR (2V Range)
No Missing Codes
Single 5V Supply
Low Power Dissipation: 390mW
Selectable Input Ranges: 1V or 1.6V
240MHz Full Power Bandwidth S/H
Pin Compatible Family
25 Msps: LTC1746 (14-Bit), LTC1745 (12-Bit)
50 Msps: LTC1744 (14-Bit), LTC1743 (12-Bit)
65 Msps: LTC1742 (14-Bit), LTC1741 (12-Bit)
80 Msps: LTC1748 (14-Bit), LTC1747 (12-Bit)
ANALOG INPUT
DIFFERENTIAL
4.7 F
1V
SENSE
A
A
V
IN
IN
CM
+
U
2.35V
SELECT
RANGE
REF
W
BUFFER
25Msps, 14-Bit ADC with a 1V Differential Input Range
AMP
S/H
DIFF AMP
0.1 F
REFLB
1 F
PIPELINED ADC
14-BIT
REFHA
4.7 F
Low Power,14-Bit, 25Msps ADC
DESCRIPTIO
The LTC
verter designed for digitizing high frequency, wide dy-
namic range signals. Pin selectable input ranges of 1V
and 1.6V along with a resistor programmable mode
allow the LTC1746’s input range to be optimized for a wide
variety of applications.
The LTC1746 is perfect for demanding communications
applications with AC performance that includes 77.5dB
SNR and 91dB spurious free dynamic range. Ultralow jitter
of 0.3ps
performance. DC specs include 3LSB INL maximum and
no missing codes over temperature.
The digital interface is compatible with 5V, 3V and 2V logic
systems. The ENC and ENC inputs may be driven differen-
tially from PECL, GTL and other low swing logic families or
from single-ended TTL or CMOS. The low noise, high gain
ENC and ENC inputs may also be driven by a sinusoidal
signal without degrading performance. A separate digital
output power supply can be operated from 0.5V to 5V,
making it easy to connect directly to low voltage DSPs
or FIFOs.
The TSSOP package with a flow-through pinout simplifies
the board layout.
REFLA
1 F
0.1 F
REFHB
RMS
®
ENCODE INPUT
1746 is a 25Msps, sampling 14-bit A/D con-
DIFFERENTIAL
ENC
allows undersampling with excellent noise
CONTROL LOGIC
ENC
14
U
MSBINV
LATCHES
OUTPUT
OE
GND
1746 BD
OGND
V
DD
OF
D13
D0
CLKOUT
1 F
OV
DD
0.1 F
1 F
LTC1746
1 F
0.1 F
5V
0.5V TO 5V
1
1746f

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LTC1746 Summary of contents

Page 1

... Pin selectable input ranges of 1V and 1.6V along with a resistor programmable mode allow the LTC1746’s input range to be optimized for a wide variety of applications. The LTC1746 is perfect for demanding communications applications with AC performance that includes 77.5dB SNR and 91dB spurious free dynamic range ...

Page 2

... Digital Output Voltage ................. – 0. OGND Voltage ..............................................– 0. Power Dissipation ............................................ 2000mW Operating Temperature Range LTC1746C ............................................... LTC1746I ............................................ – Storage Temperature Range ................. – 150 C Lead Temperature (Soldering, 10 sec).................. 300 VERTER CHARACTERISTICS temperature range, otherwise specifications are at T ...

Page 3

... Input Signal, First 5 Harmonics (3.2V Range 4MHz 5.1MHz (2V Range) IN1 IN2 f = 4MHz 5.1MHz (3.2V Range) IN1 IN2 SOURCE (Note 5) CONDITIONS OUT OUT 4.75V V 5.25V DD 1mA I 1mA OUT LTC1746 MIN TYP MAX UNITS 74 dBFS 75.5 77.5 dBFS 73.5 dBFS 76.5 dBFS 72.5 dBFS 75 dBFS 86 ...

Page 4

... LTC1746 U U DIGITAL I PUTS A D DIGITAL OUTPUTS operating temperature range, otherwise specifications are at T SYMBOL PARAMETER V High Level Input Voltage IH V Low Level Input Voltage IL I Digital Input Current IN C Digital Input Capacitance IN V High Level Output Voltage OH V Low Level Output Voltage ...

Page 5

... FREQUENCY (MHz) 1746 G08 LTC1746 Nonaveraged, 32768 Point FFT, Input Frequency = 5MHz, 3.2V Range 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 ...

Page 6

... LTC1746 W U TYPICAL PERFOR A CE CHARACTERISTICS Grounded Input Histogram 25000 20000 15000 10000 5000 0 8167 8168 8169 8170 8171 8172 CODE 1746 G10 SNR vs Input Frequency and Amplitude 3.2V Range 80 –1dBFS 75 –6dBFS –20dBFS INPUT FREQUENCY (MHz) SFDR vs Input Frequency and Amplitude, 3 ...

Page 7

... SFDR dBFS 90 80 SFDR dBc 70 60 –20 –60 –40 0 INPUT AMPLITUDE (dBFS) 1746 G21 LTC1746 Worst Harmonic 4th or Higher vs Input Frequency, 3.2V Range, –1dB –60 –70 –80 –90 –100 –110 100 INPUT FREQUENCY (MHz) 1746 G19 ...

Page 8

... LTC1746 CTIO S SENSE (Pin 1): Reference Sense Pin. Ground selects 1V. V selects 1.6V. Greater than 1V and less than DD 1.6V applied to the SENSE pin selects an input range 1.6V is the largest valid input range. SENSE V (Pin 2): 2.35V Output and Input Common Mode Bias. CM Bypass to ground with 4.7 F ceramic chip capacitor. ...

Page 9

... DATA N D11 TO D0, OF AND CLKOUT W S/H 14-BIT AMP PIPELINED ADC DIFF AMP REFLB REFHA REFLA REFHB 4.7 F 0 LTC1746 DATA (N – 4) DATA (N – 3) D11 TO D0 D11 TO D0 1746 0 D13 OUTPUT • • • LATCHES D0 CLKOUT OGND V ...

Page 10

... LTC1746 U U APPLICATIO S I FOR ATIO DYNAMIC PERFORMANCE Signal-to-Noise Plus Distortion Ratio The signal-to-noise plus distortion ratio [ D)] is the ratio between the RMS amplitude of the fundamental input frequency and the RMS amplitude of all other frequency components at the ADC output. The output is band limited to frequencies above DC to below half the sampling frequency ...

Page 11

... U U APPLICATIO S I FOR ATIO CONVERTER OPERATION As shown in Figure 1, the LTC1746 is a CMOS pipelined multistep converter. The converter has four pipelined ADC stages; a sampled analog input will result in a digitized value five cycles later, see the Timing Diagram section. The analog input is differential for improved common mode noise immunity and to maximize the input range ...

Page 12

... SAMPLE/HOLD OPERATION AND INPUT DRIVE Sample Hold Operation Figure 2 shows an equivalent circuit for the LTC1746 CMOS differential sample-and-hold. The differential ana- log inputs are sampled directly onto sampling capacitors (C ) through CMOS transmission gates ...

Page 13

... Conversion Using a Transformer W U Input Drive Circuits Figure 3 shows the LTC1746 being driven transformer with a center tapped secondary. The second- ary center tap is DC biased with V signal at its optimum DC level. Figure 3 shows a 1:1 turns ratio transformer. Other turns ratios can be used if the ...

Page 14

... U U APPLICATIO S I FOR ATIO Reference Operation Figure 5 shows the LTC1746 reference circuitry consisting of a 2.35V bandgap reference, a difference amplifier and switching and control circuit. The internal voltage refer- ence can be configured for two pin selectable input ranges of 2V( 1V differential) or 3.2V( 1.6V differential). Tying the SENSE pin to ground selects the 2V range ...

Page 15

... Not Recommended for Low Jitter W U Driving the Encode Inputs The noise performance of the LTC1746 can depend on the encode signal quality as much as on the analog input. The ENC/ENC inputs are intended to be driven differentially, primarily for noise immunity from common mode noise sources ...

Page 16

... DD single-ended drive. Maximum and Minimum Encode Rates The maximum encode rate for the LTC1746 is 25Msps. For the ADC to operate properly the encode signal should have a 50% ( 5%) duty cycle. Each half cycle must have at least 19ns for the ADC internal circuitry to have enough settling time for proper operation ...

Page 17

... The output Hi-Z state is intended for use during long periods of inactivity. GROUNDING AND BYPASSING The LTC1746 requires a printed circuit board with a clean unbroken ground plane. A multilayer board with an inter- nal ground plane is recommended. The pinout of the LTC1746 has been optimized for a flowthrough layout so that the interaction between inputs and digital outputs is minimized ...

Page 18

... ADC OGND (Pin 38). HEAT TRANSFER Most of the heat generated by the LTC1746 is transferred from the die through the package leads onto the printed circuit board. In particular, ground pins 12, 13, 36 and 37 are fused to the die attach pad. These pins have the lowest thermal resistance between the die and the outside envi- ronment ...

Page 19

... BSC LTC1746 (.311 – .327) 1.20 (.0473) MAX 0.17 – 0.27 0.05 – 0.15 (.002 – .006) 7.9 – 8.3 -T- ...

Page 20

... Low Power, 79dB SINAD, 91dB SFDR Pin Compatible with the LTC1746 Pin Compatible with the LTC1746 Pin Compatible with the LTC1746 Pin Compatible with the LTC1746 Pin Compatible with the LTC1746 Pin Compatible with the LTC1746 Pin Compatible with the LTC1746 www.linear.com 1746f LT/TP 0903 1K • ...

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