LTC2229 LINER [Linear Technology], LTC2229 Datasheet

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LTC2229

Manufacturer Part Number
LTC2229
Description
12-Bit, 80Msps Low Power 3V ADC
Manufacturer
LINER [Linear Technology]
Datasheet

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FEATURES
APPLICATIO S
TYPICAL APPLICATIO
ANALOG
INPUT
REFH
REFL
Sample Rate: 80Msps
Single 3V Supply (2.7V to 3.4V)
Low Power: 211mW
70.6dB SNR at 70MHz Input
90dB SFDR at 70MHz Input
No Missing Codes
Flexible Input: 1V
575MHz Full Power Bandwidth S/H
Clock Duty Cycle Stabilizer
Shutdown and Nap Modes
Pin Compatible Family
125Msps: LTC2253 (12-Bit), LTC2255 (14-Bit)
105Msps: LTC2252 (12-Bit), LTC2254 (14-Bit)
80Msps: LTC2229 (12-Bit), LTC2249 (14-Bit)
65Msps: LTC2228 (12-Bit), LTC2248 (14-Bit)
40Msps: LTC2227 (12-Bit), LTC2247 (14-Bit)
25Msps: LTC2226 (12-Bit), LTC2246 (14-Bit)
10Msps: LTC2225 (12-Bit), LTC2245 (14-Bit)
32-Pin (5mm × 5mm) QFN Package
Wireless and Wired Broadband Communication
Imaging Systems
Ultrasound
Spectral Analysis
Portable Instrumentation
+
CLOCK/DUTY
REFERENCE
INPUT
CONTROL
FLEXIBLE
S/H
CYCLE
CLK
U
P-P
to 2V
PIPELINED
ADC CORE
12-BIT
P-P
Range
U
CORRECTION
LOGIC
DRIVERS
OUTPUT
2229 TA01
DESCRIPTIO
The LTC
converter designed for digitizing high frequency, wide
dynamic range signals. The LTC2229 is perfect for de-
manding imaging and communications applications with
AC performance that includes 70.6dB SNR and 90dB
SFDR for signals well beyond the Nyquist frequency.
DC specs include ±0.4LSB INL (typ), ±0.2LSB DNL (typ)
and no missing codes over temperature. The transition
noise is a low 0.3LSB
A single 3V supply allows low power operation. A separate
output supply allows the outputs to drive 0.5V to 3.6V
logic.
A single-ended CLK input controls converter operation. An
optional clock duty cycle stabilizer allows high perfor-
mance at full speed for a wide range of clock duty cycles.
All other trademarks are the property of their respective owners.
, LTC and LT are registered trademarks of Linear Technology Corporation.
OV
D11
OGND
D0
DD
®
2229 is a 12-bit 80Msps, low power 3V A/D
U
Low Power 3V ADC
RMS
71
75
74
73
72
70
69
68
67
66
65
0
.
SNR vs Input Frequency,
INPUT FREQUENCY (MHz)
50
–1dB, 2V Range
12-Bit, 80Msps
100
LTC2229
150
2229 G09
200
2229fa
1

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LTC2229 Summary of contents

Page 1

... The LTC 2229 is a 12-bit 80Msps, low power 3V A/D converter designed for digitizing high frequency, wide dynamic range signals. The LTC2229 is perfect for de- manding imaging and communications applications with AC performance that includes 70.6dB SNR and 90dB SFDR for signals well beyond the Nyquist frequency. ...

Page 2

... Analog Input Voltage (Note 3) ..... –0. Digital Input Voltage .................... –0. Digital Output Voltage ................ –0.3V to (OV Power Dissipation ............................................ 1500mW Operating Temperature Range LTC2229C ............................................... 0°C to 70°C LTC2229I .............................................–40°C to 85°C Storage Temperature Range ..................–65°C to 125° VERTER CHARACTERISTICS ...

Page 3

... Input 5MHz Input 40MHz Input 70MHz Input 140MHz Input f = 28.2MHz 26.8MHz IN1 IN2 Figure 8 Test Circuit (Note 4) CONDITIONS OUT 2.7V < V < 3.4V DD –1mA < I < 1mA OUT LTC2229 MIN TYP MAX UNITS ±0.5 to ±1 ● V ● 1 1.5 1.9 V ● 0.5 1 µA ● –1 1 µ ...

Page 4

... LTC2229 U U DIGITAL I PUTS A D DIGITAL OUTPUTS full operating temperature range, otherwise specifications are at T SYMBOL PARAMETER LOGIC INPUTS (CLK, OE, SHDN) V High Level Input Voltage IH V Low Level Input Voltage IL I Input Current IN C Input Capacitance IN LOGIC OUTPUTS Hi-Z Output Capacitance ...

Page 5

... Note 3V differential drive. without latchup. Note 9: Recommended operating conditions. with differential P-P Typical DNL, 2V Range 1.0 0.8 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 2048 0 1024 3072 CODE LTC2229 MIN TYP MAX ● ● 5.9 6.25 500 ● 5 6.25 500 ● 5.9 6.25 500 ● 5 6.25 500 0 ● 1.4 2 ...

Page 6

... LTC2229 W U TYPICAL PERFOR A CE CHARACTERISTICS 8192 Point FFT 30MHz, IN –1dB, 2V Range 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 FREQUENCY (MHz) 2229 G04 8192 Point 2-Tone FFT 28.2MHz and 26.8MHz, IN –1dB, 2V Range 0 – ...

Page 7

... G13 I OVDD Wave Input, –1dB RANGE 100 0 2229 G15 LTC2229 = 70MHz, 2V Range IN dBFS dBc 100dBc SFDR REFERENCE LINE –40 –30 0 –60 –50 –20 –10 INPUT LEVEL (dBFS) 2229 G14 vs Sample Rate, 5MHz Sine = 1.8V VDD ...

Page 8

... LTC2229 CTIO (Pin 1): Positive Differential Analog Input (Pin 2): Negative Differential Analog Input. IN REFH (Pins 3, 4): ADC High Reference. Short together and bypass to pins 5, 6 with a 0.1µF ceramic chip capacitor as close to the pin as possible. Also bypass to pins 5, 6 with an additional 2.2µ ...

Page 9

... INTERNAL CLOCK SIGNALS DIFF CLOCK/DUTY CYCLE REF CONTROL AMP REFH REFL 0.1µF CLK MODE 2.2µF 1µF 1µF Figure 1. Functional Block Diagram LTC2229 FIFTH PIPELINED SIXTH PIPELINED ADC STAGE ADC STAGE SHIFT REGISTER AND CORRECTION OV OF D11 CONTROL OUTPUT • LOGIC DRIVERS • ...

Page 10

... LTC2229 DIAGRA t AP ANALOG N INPUT t H CLK – 5 D0-D11 – – – – 2229 TD01 2229fa ...

Page 11

... Aperture Delay Jitter The variation in the aperture delay time from conversion to conversion. This random variation will result in noise when sampling an AC input. The signal to noise ratio due to the jitter alone will be: SNR JITTER LTC2229 = –20log (2π • f • JITTER 2229fa ...

Page 12

... U U APPLICATIO S I FOR ATIO CONVERTER OPERATION As shown in Figure 1, the LTC2229 is a CMOS pipelined multistep converter. The converter has six pipelined ADC stages; a sampled analog input will result in a digitized value five cycles later (see the Timing Diagram section). For optimal AC performance the analog inputs should be driven differentially ...

Page 13

... Poor matching will result in higher even order harmonics, especially the second Input Drive Circuits Figure 3 shows the LTC2229 being driven transformer with a center tapped secondary. The second- ary center tap is DC biased with V + signal at its optimum DC level. Terminating on the trans- IN – ...

Page 14

... Figure 8, the series inductors are impedance matching elements that maximize the ADC bandwidth. Reference Operation Figure 9 shows the LTC2229 reference circuitry consisting of a 1.5V bandgap reference, a difference amplifier and switching and control circuit. The internal voltage refer- ence can be configured for two pin selectable input ranges of 2V (± ...

Page 15

... A sinusoidal clock can also be used along with a low-jitter squaring circuit before the CLK pin (see Figure 11). The noise performance of the LTC2229 can depend on the clock signal quality as much as on the analog input. Any noise present on the clock signal will result in additional aperture jitter that will be RMS summed with the inherent ADC aperture jitter ...

Page 16

... PLL to lock onto the input clock. To use the clock duty cycle stabilizer, the MODE pin should be connected to 1/3V The lower limit of the LTC2229 sample rate is determined by droop of the sample-and-hold circuits. The pipelined architecture of this ADC relies on storing analog signals on small valued capacitors ...

Page 17

... Data Format 1111 1111 1110 Using the MODE pin, the LTC2229 parallel digital output 1000 0000 0001 can be selected for offset binary or 2’s complement 1000 0000 0000 1000 0000 0000 format. Connecting MODE to GND or 1/3V binary output format ...

Page 18

... Heat Transfer Most of the heat generated by the LTC2229 is transferred from the die through the bottom-side exposed pad and package leads onto the printed circuit board. For good and OE electrical and thermal performance, the exposed pad DD should be soldered to a large grounded pad on the PC board ...

Page 19

... PCBs. The differential pairs must be close together, and distanced from other signals. The differential pair should be guarded on both sides with copper distanced at least 3x the distance between the traces, and grounded with vias no more than 1/4 inch apart. LTC2229 2229fa 19 ...

Page 20

... LTC2229 U U APPLICATIO S I FOR ATIO 2229fa ...

Page 21

... U U APPLICATIO S I FOR ATIO Silkscreen Top W U Inner Layer 2 GND LTC2229 Topside 2229fa 21 ...

Page 22

... LTC2229 U U APPLICATIO S I FOR ATIO Inner Layer 3 Power Silkscreen Bottom Bottomside 2229fa ...

Page 23

... U UH Package 32-Lead Plastic QFN (5mm × 5mm) (Reference LTC DWG # 05-08-1693) 0.70 ±0.05 PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 0.75 ± 0.05 0.00 – 0.05 3.45 ± 0.10 (4-SIDES) 0.200 REF LTC2229 BOTTOM VIEW—EXPOSED PAD 0.23 TYP R = 0.115 (4 SIDES) TYP 31 32 0.40 ± 0. (UH) QFN 0603 0.25 ± 0.05 0.50 BSC ...

Page 24

... ADC, Lowest Power LTC2226 12-Bit, 25Msps, 3V ADC, Lowest Power LTC2227 12-Bit, 40Msps, 3V ADC, Lowest Power LTC2228 12-Bit, 65Msps, 3V ADC, Lowest Power LTC2229 12-Bit, 80Msps, 3V ADC, Lowest Power LTC2236 10-Bit, 25Msps, 3V ADC, Lowest Power LTC2237 10-Bit, 40Msps, 3V ADC, Lowest Power LTC2238 ...

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