LTC2283 Linear Technology, LTC2283 Datasheet

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LTC2283

Manufacturer Part Number
LTC2283
Description
125Msps Low Power 3V ADC
Manufacturer
Linear Technology
Datasheet
www.datasheet4u.com
FEATURES
APPLICATIONS
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TYPICAL APPLICATION
ANALOG
ANALOG
INPUT A
INPUT B
CLK A
CLK B
Integrated Dual 12-Bit ADCs
Sample Rate: 125Msps
Single 3V Supply (2.85V to 3.4V)
Low Power: 790mW
70.2dB SNR, 88dB SFDR
110dB Channel Isolation at 100MHz
Flexible Input: 1V
640MHz Full Power Bandwidth S/H
Clock Duty Cycle Stabilizer
Shutdown and Nap Modes
Data Ready Output Clock
Pin Compatible Family
125Msps: LTC2283 (12-Bit), LTC2285 (14-Bit)
105Msps: LTC2282 (12-Bit), LTC2284 (14-Bit)
80Msps: LTC2294 (12-Bit), LTC2299 (14-Bit)
65Msps: LTC2293 (12-Bit), LTC2298 (14-Bit)
40Msps: LTC2292 (12-Bit), LTC2297 (14-Bit)
64-Pin (9mm × 9mm) QFN Package
Wireless and Wired Broadband Communication
Imaging Systems
Spectral Analysis
Portable Instrumentation
CLOCK/DUTY CYCLE
CLOCK/DUTY CYCLE
+
+
INPUT
INPUT
CONTROL
CONTROL
S/H
S/H
P-P
to 2V
PIPELINED
ADC CORE
PIPELINED
ADC CORE
P-P
12-BIT
12-BIT
Range
DRIVERS
DRIVERS
OUTPUT
OUTPUT
DESCRIPTION
The LTC
A/D converter designed for digitizing high frequency,
wide dynamic range signals. The LTC2283 is perfect for
demanding imaging and communications applications
with AC performance that includes 70.1dB SNR and 82dB
SFDR for signals at the Nyquist frequency.
Typical DC specs include ±0.4LSB INL, ±0.2LSB DNL. The
transition noise is a low 0.32LSB
A single 3V supply allows low power operation. A separate
output supply allows the outputs to drive 0.5V to 3.6V
logic.
A single-ended CLK input controls converter operation.
An optional clock duty cycle stabilizer allows high perfor-
mance at full speed for a wide range of clock duty cycles.
A data ready output clock (CLKOUT) can be used to latch
the output data.
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other
trademarks are the property of their respective owners.
2283 TA01
OV
D11A
D0A
OGND
OF
MUX
CLKOUT
OV
D11B
D0B
OGND
• •
• •
DD
DD
®
2283 is a 12-bit 125Msps, low power dual 3V
Dual 12-Bit, 125Msps
Low Power 3V ADC
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0
SNR vs Input Frequency,
50
–1dB, 2V Range
INPUT FREQUENCY (MHz)
100
RMS
150
.
200
LTC2283
250
300
2283 TA01b
350
2283fb
1

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LTC2283 Summary of contents

Page 1

... ADC CORE – DESCRIPTION The LTC A/D converter designed for digitizing high frequency, wide dynamic range signals. The LTC2283 is perfect for demanding imaging and communications applications with AC performance that includes 70.1dB SNR and 82dB SFDR for signals at the Nyquist frequency. Range Typical DC specs include ±0.4LSB INL, ±0.2LSB DNL. The transition noise is a low 0 ...

Page 2

... Analog Input Voltage (Note 3) .......–0. Digital Input Voltage ......................–0. Digital Output Voltage ................ –0.3V to (OV Power Dissipation .............................................1500mW Operating Temperature Range LTC2283C ................................................ 0°C to 70°C LTC2283I.............................................. –40°C to 85°C Storage Temperature Range ................... –65°C to 150°C ORDER INFORMATION LEAD FREE FINISH ...

Page 3

... Input 30MHz Input 70MHz Input 140MHz Input 5MHz Input 30MHz Input 70MHz Input 140MHz Input 5MHz Input 30MHz Input 70MHz Input 140MHz Input f = 40MHz, 41MHz 100MHz IN LTC2283 MIN TYP MAX ±2 0.32 LSB MIN TYP MAX ● ±0.5V to ±1V ● 1 1.5 1.9 ● 0.5 1 ...

Page 4

... LTC2283 INTERNAL REFERENCE CHARACTERISTICS PARAMETER V Output Voltage CM www.datasheet4u.com V Output Tempco CM V Line Regulation CM V Output Resistance CM DIGITAL INPUTS AND DIGITAL OUTPUTS full operating temperature range, otherwise specifi cations are at T SYMBOL PARAMETER LOGIC INPUTS (CLK, OE, SHDN, MUX) V High Level Input Voltage ...

Page 5

... Note 7: Guaranteed by design, not subject to test. , they Note drive. The supply current and power dissipation are the sum total for both without latchup. channels with both channels active. DD with differential Note 9: Recommended operating conditions. P-P LTC2283 MIN TYP MAX ● 2.85 3 3.4 ● 0.5 3 3.6 ● ...

Page 6

... LTC2283 TYPICAL PERFORMANCE CHARACTERISTICS Crosstalk vs Input Frequency www.datasheet4u.com –100 –105 –110 –115 –120 –125 –130 INPUT FREQUENCY (MHz) 8192 Point FFT 5MHz, IN –1dB, 2V Range, 125Msps 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 ...

Page 7

... INPUT LEVEL (dBFS) 2283 G13 = 1.8V SNR vs SENSE 100 120 140 0.4 2283 G16 LTC2283 SNR and SFDR vs Sample Rate, 2V Range 5MHz, –1dB IN 90 SFDR 80 SNR 300 350 100 120 140 160 SAMPLE RATE (Msps) ...

Page 8

... LTC2283 PIN FUNCTIONS + A (Pin 1): Channel A Positive Differential Analog INA Input. – www.datasheet4u.com A (Pin 2): Channel A Negative Differential Analog INA Input. REFHA (Pins 3, 4): Channel A High Reference. Short to- gether and bypass to Pins 5, 6 with a 0.1μF ceramic chip capacitor as close to the pin as possible. Also bypass to Pins 5, 6 with an additional 2.2μ ...

Page 9

... DIFF CLOCK/DUTY CYCLE REF CONTROL AMP REFH 0.1μF REFL CLK MODE 2.2μF 1μF 1μF LTC2283 selects 2’s comple CMB selects the internal reference CMA selects the internal reference DD . ±1V is the largest valid input range. SENSEA FIFTH PIPELINED SIXTH PIPELINED ADC STAGE ...

Page 10

... LTC2283 TIMING DIAGRAMS www.datasheet4u.com ANALOG N INPUT CLKA = CLKB D0-D11, OF CLKOUT ANALOG INPUT A ANALOG INPUT B CLKA = CLKB = MUX D0A-D11A D0B-D11B CLKOUT 10 Dual Digital Output Bus Timing (Only One Channel is Shown – – – ...

Page 11

... CONVERTER OPERATION As shown in Figure 1, the LTC2283 is a dual CMOS pipelined multistep converter. The converter has six pipelined ADC stages; a sampled analog input will result in a digitized value fi ve cycles later (see the Timing Diagram section). ...

Page 12

... SAMPLE/HOLD OPERATION AND INPUT DRIVE Sample/Hold Operation Figure 2 shows an equivalent circuit for the LTC2283 CMOS differential sample-and-hold. The analog inputs are con- nected to the sampling capacitors (C transistors. The capacitors shown attached to each input ...

Page 13

... ADC with a 2.2μF or greater capacitor. Input Drive Impedance As with all high performance, high speed ADCs, the dynamic performance of the LTC2283 can be infl uenced by the input drive circuitry, particularly the second and third harmonics. Source impedance and reactance can infl uence SFDR. At the falling edge of CLK, the sample-and-hold circuit will connect the 3 ...

Page 14

... V CM 2.2μF 0.1μF 8.2nH + A IN 0.1μF 25Ω T1 0.1μF 25Ω 8.2nH – MA/COM, ETC 1-1-13 RESISTORS, CAPACITORS, INDUCTORS ARE 0402 PACKAGE SIZE Figure 8. Recommended Front End Circuit for Input Frequencies Above 300MHz LTC2283 2283 F06 LTC2283 2283 F07 LTC2283 2283 F08 2283fb ...

Page 15

... APPLICATIONS INFORMATION Reference Operation Figure 9 shows the LTC2283 reference circuitry consisting www.datasheet4u.com of a 1.5V bandgap reference, a difference amplifi er and switching and control circuit. The internal voltage reference can be confi gured for two pin selectable input ranges of 2V (±1V differential (±0.5V differential). Tying the SENSE pin to V selects the 2V range ...

Page 16

... NC7SVU04 Figure 11. Sinusoidal Single-Ended CLK Drive The noise performance of the LTC2283 can depend on the clock signal quality as much as on the analog input. Any noise present on the clock signal will result in additional aperture jitter that will be RMS summed with the inherent ADC aperture jitter ...

Page 17

... DD DD digital output loading can affect the performance. The digital outputs of the LTC2283 should drive a minimal capacitive load to avoid possible interaction between the digital outputs and sensitive input circuitry. For full speed operation the capacitive load should be kept under 10pF . voltages will also help reduce interference ...

Page 18

... OE pin. Grounding and Bypassing The LTC2283 requires a printed circuit board with a clean, unbroken ground plane. A multilayer board with an internal ground plane is recommended. Layout for the printed circuit board should ensure that digital and analog signal lines are separated as much as possible ...

Page 19

... Heat Transfer Most of the heat generated by the LTC2283 is transferred from the die through the bottom-side Exposed Pad and package leads onto the printed circuit board. For good electrical and thermal performance, the Exposed Pad should be soldered to a large grounded pad on the PC board ...

Page 20

... LTC2283 APPLICATIONS INFORMATION www.datasheet4u.com OGND OGND 50 31 DA8 DB6 51 30 DA9 DB5 52 29 DA10 DB4 53 28 DA11 DB3 54 27 DA12 DB2 55 26 DA13 DB1 DB0 24 57 OEA OEB 23 58 SHDNA SHDNB 22 59 MODE MUX 60 21 VCMA VCMB ...

Page 21

... APPLICATIONS INFORMATION www.datasheet4u.com Silkscreen Top Top Side LTC2283 2283fb 21 ...

Page 22

... LTC2283 APPLICATIONS INFORMATION Inner Layer 2 GND www.datasheet4u.com 22 Inner Layer 3 Power Bottom Side 2283fb ...

Page 23

... Plastic QFN (9mm × 9mm) (Reference LTC DWG # 05-08-1705) 0.70 ±0.05 7.50 REF 8.10 ±0.05 9.50 ±0.05 (4 SIDES) PACKAGE OUTLINE 0.25 ±0.05 0.50 BSC 0.75 ± 0. 0.10 TYP 7.50 REF (4-SIDES) 0.200 REF 0.00 – 0.05 LTC2283 R = 0.115 TYP 63 64 PIN 1 CHAMFER C = 0.35 7.15 ± 0.10 7.15 ± 0.10 (UP64) QFN 0406 REV C 0.25 ± 0.05 0.50 BSC BOTTOM VIEW—EXPOSED PAD 23 0.40 ± 0.10 ...

Page 24

... LTC2283 TYPICAL APPLICATION PART NUMBER DESCRIPTION LTC1748 14-Bit, 80Msps, 5V ADC www.datasheet4u.com LTC1750 14-Bit, 80Msps, 5V Wideband ADC LTC1993-2 High Speed Differential Op Amp LTC1994 Low Noise, Low Distortion Fully Differential Input/Output Amplifi er/Driver LTC2208 16-Bit, 130Msps, 3.3V ADC, LVDS Outputs LTC2220 12-Bit, 170Msps, 3.3V ADC, LVDS Outputs LTC2224 12-Bit, 135Msps, 3 ...

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