LTC2351-14 Linear Technology, LTC2351-14 Datasheet
LTC2351-14
Related parts for LTC2351-14
LTC2351-14 Summary of contents
Page 1
... QFN package. A SLEEP shutdown mode further reduces power consumption to 12µW. The combination of low power and tiny package makes the LTC2351-14 suitable for portable applications. The LTC2351-14 contains six separate differential inputs that are sampled simultaneously on the rising edge of the CONV signal ...
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... LTC2351- BSOLUTE A XI (Notes 1, 2) Supply Voltage ( Analog and V Input Voltages REF (Note 3) ................................... – 0. Digital Input Voltages .................. – 0. Digital Output Voltage .................. – 0. Power Dissipation .............................................. 100mW Operation Temperature Range LTC2351C-14 .......................................... 0°C to 70°C www.DataSheet4U.com LTC2351I-14 ...................................... – 40°C to 85°C Storage Temperature Range ................. – ...
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... DD OUT V = 2.7V 160µA DD OUT V = 2.7V 1.6mA DD OUT and V OUT OUT DD OUT OUT OUT DD LTC2351-14 = 3V. CC MIN TYP ● ● –80 –90 – –80 0 25° 3V MIN TYP 2 ...
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... LTC2351-14 POWER REQUIRE E TS range, otherwise specifications are at T SYMBOL PARAMETER Supply Voltage Supply Current Power Dissipation CHARACTERISTICS range, otherwise specifications are at T www.DataSheet4U.com SYMBOL PARAMETER f Maximum Sampling Frequency per Channel SAMPLE(MAX) (Conversion Rate) t Minimum Sampling Period (Conversion + Acquisiton Period) ...
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... Unipolar Mode 1 0.8 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1 100 125 0 4096 8192 OUTPUT CODE 235114 G07 LTC2351- 3V 25° THD, 2nd and 3rd vs Input Frequency –50 BIPOLAR SINGLE-ENDED –56 –62 THD –68 2nd –74 –80 –86 3rd –92 –98 – ...
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... LTC2351-14 TYPICAL PERFOR A CE CHARACTERISTICS Full Scale Signal Response 3 0 –3 –6 –9 –12 –15 –18 www.DataSheet4U.com –21 –24 –27 –30 10 FREQUENCY (MHz) Crosstalk vs Frequency 0 –20 –40 –60 –80 –100 –120 100 1k 10k 100k FREQUENCY (Hz 100 1000 235114 G10 ...
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... DD capacitor (or 10µF tantalum in parallel with 0.1µF ce- ramic). Can be overdriven by an external reference voltage + operates between 2.55V and V – with 2.5V, absolute DD LTC2351-14 + operates – with 2.5V, absolute DD – operates fully + with a –2.5V to 0V, or absolute ...
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... LTC2351- CTIO S V (Pin 24): 3V Positive Analog Supply. This pin supplies the analog section. Bypass to the solid analog ground plane with a 10µF ceramic capacitor (or 10µF tantalum) in parallel with 0.1µF ceramic. Care should be taken to place the 0.1µF bypass capacitor as close to Pin 24 as possible ...
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... MUX 1.5Msps 14-BIT ADC + S & H – & H – & H – 2.5V REFERENCE GND V BIP REF 10µF LTC2351- 14-BIT LATCH THREE- 14-BIT LATCH 1 STATE 14-BIT LATCH 2 SD0 SERIAL 1 14-BIT LATCH 3 OUTPUT 14-BIT LATCH 4 OGND PORT 2 14-BIT LATCH 5 ...
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... LTC2351- DIAGRA S www.DataSheet4U.com SCK 10 W 235114f ...
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... CONV NAP www.DataSheet4U.com SLEEP V REF NOTE: NAP AND SLEEP ARE INTERNAL SIGNALS SCK SDO W Nap Mode and Sleep Mode Waveforms t 1 SCK to SDO Delay SDO V OL LTC2351- SCK Hi-Z 235114 TD03 235114 TD02 235114f 11 ...
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... BIPOLAR, you can still read the first set of channels in the new mode, by inverting the MSB to read these channels in the mode that they were converted in. DRIVING THE ANALOG INPUT The differential analog inputs of the LTC2351-14 may be driven differentially single-ended input (i.e., the CH0 differential analog input pairs, CH0 ...
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... If slower op amps are used, more time for settling can be provided by increasing the time between conversions. The best choice for an op amp to drive the LTC2351-14 depends on the application. Generally, applications fall into two catego- ries: AC applications where dynamic specifications are most critical and time domain applications where DC accuracy and settling time are most critical ...
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... Figure 1. RC Input Filter INPUT RANGE The analog inputs of the LTC2351-14 may be driven fully differentially with a single supply. Either input may swing 2.5V with BIP (Pin 29) Low, or ±1.25V with (BIP Pin 29) High. The 0V to 2.5V range is also ideally suited for single- ended input use with single supply applications ...
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... CMRR is typically better than –90dB Figure 4 shows the ideal input/output characteristics for the LTC2351-14 in unipolar mode (BIP = Low). The code transitions occur midway between successive integer LSB values (i.e., 0.5LSB, 1.5LSB, 2.5LSB, FS – 1.5LSB). The (Pin 23) and the voltage at output code is straight binary with 1LSB = 2.5V/16384 = 153µ ...
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... SCK wake up the LTC2351-14 very quickly and CONV can start an accurate conversion within a clock cycle. Four rising edges at CONV, without any intervening rising edges at SCK, put the LTC2351-14 in Sleep mode and the power consumption drops from 16.5mW to 12µW. One or more rising edges at SCK wake up the LTC2351-14 for operation. The internal reference (V and settle with a 10µ ...
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... CONV rises, the third rising edge of SCK sends out up to six sets of 14 data bits, with the MSB sent first. A simple approach is to generate SCK to drive the LTC2351-14 first and then buffer this signal with the appropriate number of inverters to drive the serial clock input of the processor serial port ...
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... Figure 6 shows the recommended system ground connec- tions. All analog circuitry grounds should be terminated at the LTC2351-14 Exposed Pad. The ground return from the LTC2351-14 to the power supply should be low imped- ance for noise-free operation. The Exposed Pad of the 32- pin QFN package is also internally tied to the ground pads. ...
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... Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. LTC2351-14 BOTTOM VIEW—EXPOSED PAD 0.115 ...
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