LTC2449 Linear Technology, LTC2449 Datasheet
LTC2449
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LTC2449 Summary of contents
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... GND to V Common Mode Range CC ■ No Latency Mode, Each Conversion is Accurate Even After a New Channel is Selected ■ Internal Oscillator—No External Components ■ LTC2445/LTC2449 Include MUXOUT/ADCIN for External Buffering or Gain ■ Tiny QFN 5mm x 7mm Package U APPLICATIO S ■ High Speed Multiplexing ■ ...
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... Consult LTC Marketing for parts specified with wider operating temperature ranges Operating Temperature Range LTC2444C/LTC2445C/ + 0.3V) LTC2448C/LTC2449C .............................. 0°C to 70°C CC LTC2444I/LTC2445I/ + 0.3V) LTC2448I/LTC2449I ........................... – 40°C to 85° 0.3V) Storage Temperature Range ................. – 65°C to 125° 0.3V ORDER PART ...
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... Voltage – Voltage + Voltage – Voltage + – GND GND – REF = 5V, REF = GND 1.8MHz IN P-P LTC2444/LTC2445/ LTC2448/LTC2449 MIN TYP MAX ● 24 ● ppm ppm of V ● 2 ● ppm of V ● ppm of V 0.2 ppm of V ● ...
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... LTC2444/LTC2445/ LTC2448/LTC2449 U U DIGITAL I PUTS A D DIGITAL OUTPUTS operating temperature range, otherwise specifications are at T SYMBOL PARAMETER V High Level Input Voltage IH CS Low Level Input Voltage IL CS High Level Input Voltage IH SCK V Low Level Input Voltage IL SCK I Digital Input Current ...
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... SCK pin. A framing signal BUSY (Pin 2) goes low indicating data is being output. COM (Pin 7): The common negative input (IN single ended multiplexer configurations. The voltage on CH0-CH15 and COM pins can have any value between LTC2444/LTC2445/ LTC2448/LTC2449 MIN TYP MAX ● ● ...
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... These pins can either be tied to ground or left floating. MUXOUTP (Pin 24): LTC2445/LTC2449 Positive Multi- plexer Output. Used to drive the input to an external buffer/ amplifier. ADCINP (Pin 25): LTC2445/LTC2449 Positive ADC Input. Tie to output of buffer/amplifier driven by MUXOUTP. ADCINN (Pin 26): LTC2445/LTC2449 Negative ADC Input. Tie to output of buffer/amplifier driven by MUXOUTN. ...
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... U APPLICATIO S I FOR ATIO CONVERTER OPERATION Converter Operation Cycle The LTC2444/LTC2445/LTC2448/LTC2449 are multi- channel, high speed, delta-sigma analog-to-digital con- verters with an easy to use 3- or 4-wire serial interface (see Figure 1). Their operation is made up of three states. The converter operating cycle begins with the conversion, followed by the low power sleep state and ends with the data output/input (see Figure 2) ...
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... IN = CH0, IN Following the POR signal, the LTC2444/LTC2445/LTC2448/ LTC2449 start a normal conversion cycle and follow the succession of states described above. The first conver- sion result following POR is accurate within the specifica- tions of the device if the power supply voltage is restored within the operating range (4.5V to 5.5V) before the end of the POR time interval ...
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... MUXOUT/ADCIN There are two differences between the LTC2444/LTC2448 and the LTC2445/LTC2449. The first is the RMS noise performance. For a given OSR, the LTC2445/LTC2449 noise level is approximately √2 times lower (0.5 effective bits)than that of the LTC2444/LTC2448. ...
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... For differential input voltages greater than REF +FS, the conversion result is clamped to the value corre- sponding to the +FS + 1LSB. For differential input voltages below –FS, the conversion result is clamped to the value corresponding to –FS – 1LSB. Table 2. LTC2444/LTC2445/LTC2448/LTC2449 Output Data Format Differential Input Voltage ≥ ...
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... The negative input is COM for all single ended operations. The remaining 4 bits (ODD, A2, A1, A0) determine which channel is selected. The LTC2448/ LTC2449 use all 4 bits to select one of 16 different input channels (see table 3) while in the case of the LTC2444/ LTC2445 always 0, and the remaining 3 bits select one of 8 different input channels (see Table 4) ...
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... LTC2444/LTC2445/ LTC2448/LTC2449 U U APPLICATIO S I FOR ATIO Table 3. Channel Selection for the LTC2448/LTC2449 MUX ADDRESS ODD/ SGL SIGN – – ...
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... LTC2444/LTC2445/ LTC2448/LTC2449 COM + – – – – – IN – – – – IN – – – ...
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... LTC2444/LTC2445/ LTC2448/LTC2449 U U APPLICATIO S I FOR ATIO Table 5. LTC2444/LTC2445/LTC2448/LTC2449 Speed/Resolution Selection OSR3 OSR2 OSR1 OSR0 TWOX INTERNAL EXTERNAL ...
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... If an external buffer/amplifier circuit is used for the LTC2445/LTC2449, the 2X mode can be used to increase the settling time of the amplifier between readings. While operating in the 2X mode, the multiplexer output (input to the external buffer/amplifier) is switched at the end of each conversion cycle ...
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... LTC2444/LTC2445/ LTC2448/LTC2449 U U APPLICATIO S I FOR ATIO External Serial Clock, Single Cycle Operation (SPI/MICROWIRE Compatible) This timing mode uses an external serial clock to shift out the conversion result and a CS signal to monitor and control the state of the conversion cycle, see Figure 4. The serial clock mode is selected by the EXT pin. To select the external serial clock mode, EXT must be tied low ...
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... CH15 BUSY 1,4,5,6,31,32,33 7 COM GND DON'T CARE BIT 31 BIT 30 BIT 29 BIT 28 BIT 27 BIT 26 BIT 25 Hi-Z EOC “0” SIG MSB DATA OUTPUT CONVERSION LTC2444/LTC2445/ LTC2448/LTC2449 TEST EOC 6 DON'T CARE Hi-Z SLEEP CONVERSION sn2444589 2444589fs 2444 F06 17 ...
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... LTC2444/LTC2445/ LTC2448/LTC2449 U U APPLICATIO S I FOR ATIO External Serial Clock, 2-Wire I/O This timing mode utilizes a 2-wire serial I/O interface. The conversion result is shifted out of the device by an exter- nally generated serial clock (SCK) signal, see Figure 6. CS may be permanently tied to ground, simplifying the user interface or isolation barrier ...
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... OSR3 BIT 29 BIT 28 BIT 27 BIT 26 BIT 25 BIT 24 BIT 23 BIT 22 BIT 21 SIG MSB DATA OUTPUT Figure 7. Internal Serial Clock, Single Cycle Operation LTC2444/LTC2445/ LTC2448/LTC2449 after the falling edge of CS EOCtest after EOC goes LOW ( LOW EOCtest EOCtest ...
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... LTC2444/LTC2445/ LTC2448/LTC2449 U U APPLICATIO S I FOR ATIO If CS remains LOW longer than t EOCtest edge of SCK will occur and the conversion result is serially shifted out of the SDO pin. The data output cycle begins on this first rising edge of SCK and concludes after the 32nd rising edge ...
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... EN SGL ODD OSR3 BIT 29 BIT 28 BIT 27 BIT 26 BIT 25 BIT 24 BIT 23 BIT 22 BIT 21 SIG MSB DATA OUTPUT Figure 9. Internal Serial Clock, Continuous Operation LTC2444/LTC2445/ LTC2448/LTC2449 OSR2 OSR1 OSR0 TWOX DON'T CARE BIT 20 BIT 19 BIT 0 LSB sn2444589 2444589fs ...
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... Normal Mode Rejection and Antialiasing One of the advantages delta-sigma ADCs offer over con- ventional ADCs is on-chip digital filtering. Combined with a large oversampling ratio, the LTC2444/LTC2445/ LTC2448/LTC2449 significantly simplify antialiasing filter requirements. The LTC2444/LTC2445/LTC2448/LTC2449’s speed/reso- lution is determined by the over sample ratio (OSR) of the on-chip digital filter ...
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... LTC1799, the output oscillator frequency is: grounded. While the The normal mode rejection characteristic shown in Figure 13 is achieved by applying the output of the LTC1799 (with R SET LTC2448/LTC2449 with SDI tied HIGH (OSR = 32768). 1.8MHz 2000000 1440 F13 Figure 13. LTC2444/LTC2445/LTC2448/LTC2449 Normal Mode Rejection (External Oscillator at 90kHz) ...
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... The LTC2444/LTC2448 switch the input and reference to a 2pF capacitor at a frequency of 1.8MHz. A simplified equivalent circuit is shown in Figure 15. The sample capacitor for the LTC2445/LTC2449 is 4pF, and its aver- age input current is externally buffered from the input source. The average input and reference currents can be ex- ...
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... Effective noise bandwidth is a measure of how the ADC will reject wideband input noise up to the modu- lator sample rate. The example on the following page shows how the noise rejection of the LTC2444/LTC2445/ LTC2448/LTC2449 reduces the effective noise of an am- plifier driving its input. Maximum First Notch ...
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... ADC input. This enables one external buffer/amplifier circuit to be shared between all 17 analog inputs (16 single-ended or 8 differential). The LTC2445/LTC2449 perform an inter- nal offset calibration every conversion cycle in order to remove the offset and drift of the ADC. This calibration is performed through a combination of front end switching and digital processing ...
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... DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.20mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE LTC2444/LTC2445/ LTC2448/LTC2449 0.70 ± 0.05 PACKAGE OUTLINE 3.15 ± 0.10 0.435 ...
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... No Latency ∆Σ ADC SoftSpan is a trademark of Linear Technology Corporation. Linear Technology Corporation 28 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 FAX: (408) 434-0507 ● External Buffers Provide High Impedance Inputs and Amplifier Offsets are Cancelled LTC2449 MUX 2 – 1 1/2 LT1368 3 + 0.22µF (EXTERNAL AMPLIFIERS) ...