LTC3412 LINER [Linear Technology], LTC3412 Datasheet

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... OPTI-LOOP compensation allows the transient response to be opti- mized over a wide range of loads and output capacitors. The LTC3412 can be configured for either Burst Mode operation or forced continuous operation. Forced con- tinuous operation reduces noise and RF interference while Burst Mode operation provides high efficiency by reduc- ing gate charge losses at light loads ...

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... PGND EXPOSED PAD (PIN 17) IS SGND, MUST BE SOLDERED TO PCB = 10°C/W JC ORDER PART NUMBER 3412EFE LTC3412EUF 3412IFE ● The denotes the specifications which apply over the full operating = 25° 3.3V unless otherwise specified CONDITIONS (Note 2.7V to 5.5V (Note 3) IN Measured in Servo Loop, V ...

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... 0V 5.5V RUN IN Note 3: The LTC3412 is tested in a feedback loop that adjusts V achieve a specified error amplifier output voltage (I Note 4: Dynamic supply current is higher due to the internal gate charge being delivered at the switching frequency. Note calculated from the ambient temperature T J dissipation as follows: LTC3412: T Note 6: 4MHz operation is guaranteed by design and not production tested ...

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... LTC3412 W U TYPICAL PERFOR A CE CHARACTERISTICS Efficiency vs Input Voltage 98 LOAD = 100mA 96 LOAD = LOAD = 2. 2.5V 88 OUT 1MHz Burst Mode OPERATION 86 2.55 3.05 3.55 4.05 4.55 5.05 INPUT VOLTAGE (V) 3412 G04 Burst Mode Operation 4μs/DIV 3412 G07 V = 3.3V 2.5V IN OUT LOAD = 50mA Start-Up, Burst Mode Operation 1ms/DIV 3412 G10 ...

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... Minimum Peak Inductor Current vs Burst Clamp Voltage 4000 V = 3.3V IN 3500 3000 2500 2000 1500 1000 500 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 BURST CLAMP VOLTAGE (V) LTC3412 Frequency vs R OSC 4500 4000 3500 3000 2500 2000 1500 1000 500 0 5.5 50 150 250 350 450 550 650 750 850 950 R (kΩ ...

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... Burst Mode operation with the burst clamp set to the pin voltage. 6 RUN/SS (Pin 7/Pin 1): Run Control and Soft-Start Input. is equal to Forcing this pin below 0.5V shuts down the LTC3412 but keep the voltage shutdown all functions are disabled drawing < 1μA of less than 0.5V. ...

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... U OPERATIO Main Control Loop The LTC3412 is a monolithic, constant-frequency, current mode step-down DC/DC converter. During normal opera- tion, the internal top power switch (P-channel MOSFET) is turned on at the beginning of each clock cycle. Current in the inductor increases until the current comparator trips and turns off the top power MOSFET ...

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... N-channel power switches increases. The pin is reconnected user should calculate the power dissipation when the TH LTC3412 is used at 100% duty cycle with low input voltages to ensure that thermal limits are not exceeded. Slope Compensation and Inductor Peak Current Slope compensation provides stability in constant fre- quency architectures by preventing subharmonic oscilla- tions at duty cycles greater than 50% ...

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... U U APPLICATIO S I FOR ATIO The basic LTC3412 application circuit is shown in Fig- ure 1. External component selection is determined by the maximum load current and begins with the selection of the inductor value and operating frequency followed by C and C ...

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... LTC3412 U U APPLICATIO S I FOR ATIO Inductor Core Selection Once the value for L is known, the type of inductor must be selected. High efficiency converters generally cannot af- ford the core loss found in low cost powdered iron cores, forcing the use of more expensive ferrite, mollypermalloy, ® ...

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... BURST Soft-Start The RUN/SS pin provides a means to shut down the LTC3412 as well as a timer for soft-start. Pulling the RUN/SS pin below 0.5V places the LTC3412 in a low quiescent current shutdown state (I LTC3412 regardless of further BURST pin will decrease. When the I ...

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... In most applications, the LTC3412 does not dissipate much heat due to its high efficiency. But, in applications 2 R losses. where the LTC3412 is running at high ambient tempera- ture with low supply voltage and high duty cycles, such as in dropout, the heat dissipated may exceed the maximum 2 R loss junction temperature of the part ...

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... A R where T is the ambient temperature example, consider the LTC3412 in dropout at an input voltage of 3.3V, a load current of 2.5A and an ambient temperature of 70°C. From the typical perfor- mance graph of switch resistance, the R channel switch at 70°C is approximately 97mΩ. There- fore, power dissipated by the part is: ...

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... SGND pin at one point which is then connected to the PGND pin close to the LTC3412. The exposed pad should be connected to SGND. 2. Connect the (+) terminal of the input capacitor(s close as possible to the PV provides the AC current into the internal power MOSFETs ...

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... PGND 110k OSC 6 SYNC/MODE SW 309k 7 10 RUN 470pF X7R 8 9 SGND PV IN LTC3412 V IN 2.7V TO 4.2V IN1 †† C 220μF L1* 1μH V OUT 2.5V 2.5A OUT2 † C 10μ OUT1 100μF ×2 C IN2 22μF GND X5R 6.3V 3412 F04 ...

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... X7R 8 9 SGND PV IN X5R 6.3V C1 22pF X5R R1 232k 100k 2 15 PGOOD SW R ITH 10k LTC3412 47pF 13 PGND PGND 110k OSC SW 309k 6 SYNC/MODE 7 10 RUN 470pF X7R 8 9 SGND ...

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... RUN 470pF X7R 8 9 SGND PV IN Efficiency vs Load Current 2MHz, Low Noise 100 0.01 0.1 1 LOAD CURRENT (A) 3412 TA07 LTC3412 IN1 100μF L1 0.47μH* V OUT 2.5V 2. OUT 100μF ×2 C IN2 100μF** GND 3412 TA06 10 3412fb 17 ...

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... SS SS 470pF X7R 4. SGND 22pF R1 576k 100k 2 15 PGOOD SW R ITH 15k LTC3412 100pF 13 PGND PGND 110k 75k OSC SW 6 309k R SYNC/MODE SS 4. RUN 470pF X7R 8 ...

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... LTC DWG # 05-08-1692) 0.75 ± 0.05 4.00 ± 0.10 (4 SIDES) 0.72 ±0.05 PIN 1 TOP MARK (NOTE 6) PACKAGE OUTLINE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE LTC3412 4.90 – 5.10* (.193 – .201) 2.74 (.108 6.40 2.74 (.252) (.108) BSC 1 ...

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... McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 FAX: (408) 434-0507 ● C1 22pF X5R R1 392k 100k 2 15 PGOOD SW R ITH 15k LTC3412 C 100pF C 13 PGND 182k 12 PGND 309k 11 OSC SW 6 1.25MHz SYNC/MODE EXT CLOCK 7 10 RUN SW ...