LTC3589 Linear Technology, LTC3589 Datasheet
LTC3589
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LTC3589 Summary of contents
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... BB_OUT WAKE HDD OR I/O PBSTAT PGOOD RSTO 3589 TA01a www.DataSheet4U.com LTC3589 Sequencing and serial port 2 C port. System power-on, power-off 2 C interface. The LTC3589 supports Start-Up Sequence I/O WAKE (1V/DIV) V SRAM ANALOG V SOC MEMORY V CORE 500μs/DIV 3589 TA01b 2 C ...
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... LTC3589 TABLE OF CONTENTS Features ............................................................................................................................ 1 Applications ....................................................................................................................... 1 Typical Application ............................................................................................................... 1 Description......................................................................................................................... 1 Absolute Maximum Ratings ..................................................................................................... 3 Pin Confi guration ................................................................................................................. 3 Order Information ................................................................................................................. 3 Electrical Characteristics ........................................................................................................ 4 Typical Performance Characteristics .......................................................................................... 8 Pin Functions .....................................................................................................................12 Block Diagram ....................................................................................................................14 Operation..........................................................................................................................15 Introduction .......................................................................................................................................................... 15 Always-On LDO ..................................................................................................................................................... 16 250mA LDO Regulators ........................................................................................................................................ 16 Step-Down Switching Regulators ......................................................................................................................... 18 Buck-Boost Switching Regulator .......................................................................................................................... 22 Slewing DAC Reference Operation ........................................................................................................................ 26 Pushbutton Operation ...
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... LTC3589IUJ#PBF LTC3589IUJ#TRPBF LTC3589HUJ#PBF LTC3589HUJ#TRPBF Consult LTC Marketing for parts specifi ed with wider operating temperature ranges. *The temperature grade is identifi label on the shipping container. Consult LTC Marketing for information on non-standard lead based fi nish parts. For more information on lead free part marking, go to: For more information on tape and reel specifi ...
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... LTC3589 ELECTRICAL CHARACTERISTICS temperature range, otherwise specifi cations are 3.8V. All regulators disabled unless otherwise noted. DD SYMBOL PARAMETER V Operating Input Supply Voltage Quiescent Current VINLDO1 IN f Oscillator Frequency OSC Step Down Switching Regulators 1, 2, and 3 I Pulse-Skipping Mode V ...
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... V = 0.8V LDO2_FB EN_LDO3 = High, LDO3_FB = 0.85V Regulator Disabled 2.7V to 5V, IN_LDO34 1mA LDO3 I =1mA 2.7V to 5.5V LDO3 INLDO34 I = 1mA to 250mA LDO3 I = 200mA 1.8V LDO3 LDO3 www.DataSheet4U.com LTC3589 = IN3 IN4 IN_LDO2 IN_LDO34 MIN TYP MAX UNITS 100 μs 2000 Ω l 0.76 0.8 0.84 V 0.2 %/V 0 ...
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... DV Quiescent Current DVDD UVLO Level DVDD_UVLO DD ADDRESS LTC3589 Device Address – Write LTC3589 Device Address – Read V SDA, SCL SDA and SCL Input Threshold Rising IH V SDA, SCL SDA and SCL Input Threshold Falling SDA and SCL Input Current ...
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... Capacitance of One BUS Line (pF 3mA PBSTAT V = 3.8V PBSTAT I = 3mA WAKE V = 3.8V WAKE I = 3mA PGOOD V = 3.8V PGOOD I = 3mA RSTO V = 3.8V RSTO I = 3mA IRQ V = 3.8V IRQ www.DataSheet4U.com LTC3589 = IN3 IN4 IN_LDO2 IN_LDO34 MIN TYP MAX UNITS 0 ns 100 ns 1.3 μs 0.6 μ 0.1C 300 0.1C 300 0.8 1.2 l 0.4 0.7 – ...
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... Maximum rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC3589 is tested under pulsed load conditions such that T The LTC3589E is guaranteed to meet specifi cations from 0°C to 85°C junction temperature. Specifi cations over the –40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls ...
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... LOAD CURRENT (mA) Step-Down Switching Regulator R vs Temperature DS(ON) 0.40 0.35 0.30 BUCK2 PMOS 0.25 BUCK1 PMOS 0.20 BUCK2 NMOS 0.15 0.10 BUCK1 NMOS 0.05 0 –50 – 110 TEMPERATURE (°C) www.DataSheet4U.com LTC3589 T = 25°C, unless otherwise noted. A Buck-Boost Effi ciency 100 BURST FORCED 40 CONTINUOUS 5.0 5.5 0.01 ...
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... LTC3589 TYPICAL PERFORMANCE CHARACTERISTICS Step-Down Switching Regulator Current Limit vs Temperature 3.5 BUCK1 3.0 2.5 2.0 BUCK2, BUCK3 1.5 1.0 0.5 0 –50 – 100 125 TEMPERATURE (°C) 3589 G16 Buck-Boost Switching Regulator Soft-Start V OUT 1V/DIV 500mA/DIV I L 100μs/DIV 3589 G19 Step-Down Switching Regulator 1 Load Step ...
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... LOAD CURRENT (mA) LDO2, LDO3, LDO4 Load Step Response V 1.8V LDO 50mV/DIV 220mA I LDO 100mA/DIV 10mA 100μs/DIV LOAD CAPACITANCE = 1μF www.DataSheet4U.com LTC3589 T = 25°C, unless otherwise noted. A LDO1 Short-Circuit Current vs Temperature 1. 2.8V = 3.3V 20 –50 – ...
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... LTC3589 PIN FUNCTIONS V (Pin 1): Power Input for LDO2. This pin should IN_LDO2 be bypassed to ground with a 1μF or greater ceramic capacitor. LDO2 (Pin 2): Output Voltage of LDO2. Nominal output voltage is set with a resistor feedback divider that servos register controlled DAC reference. This pin must be bypassed to ground with a 1μ ...
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... C Serial Port. The GND (Exposed Pad Pin 41): Ground. The Exposed Pad . must be connected to a continuous ground plane on the DD second layer of the printed circuit board by several inter- connect vias directly under the LTC3589 for maximum heat transfer. www.DataSheet4U.com LTC3589 2 C Serial Port. This ...
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... LTC3589 BLOCK DIAGRAM V IN VRTC AT 25mA LDO1_STDBY LDO1_FB ALWAYS ON LDO1 IRQ ON (PB) PBSTAT CONTROL + SEQUENCE WAKE PWR_ON VSTB EN1 EN2 EN3 EN4 EN_LDO2 EN_LDO34 SDA SCL PGOOD RSTO POWER GOOD V IN_LDO34 LDO4 0V, 1.8V, LDO4 2.5V, 2.8V, 3.3V AT 250mA 14 V BUCK-BOOST REF V REF OK EN ...
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... All regulator enables and pushbutton inputs are inhibited for one second following the hard reset. The LTC3589 has fl exible options for enabling and sequenc- ing the regulator enables. The regulators are enabled us- ing input pins or the I www ...
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... The LTC3589 will shut down all regulators and pull down the WAKE pin under high temperature, V and extended low regulator output voltage conditions. ...
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... IN each of the output pins LDO2, LDO3, and LDO4. LDO Regulator 2 One of the LTC3589 dynamic slewing DACs serves as the reference input of LDO2. The output range of LDO2 is set using an external resistor divider connected from LDO2 to the feedback pin LDO2_FB as shown in Figure 2. Set the ...
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... LTC3589 OPERATION LDO Regulator 4 LDO4 has four output voltage options that are controlled by the contents of command register L2DTV2 bits 6 and 5. By default, pin EN_LDO34 enables and disables LDO3 and LDO4 simultaneously when command register bits OVEN[6] and OVEN[7] are LOW. When EN_LDO34 is LOW, LDO3 and LDO4 are controlled by writing to com- mand register bits OVEN[6] and OVEN[7] respectively ...
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... The LTC3589 automatically forces the step-down switching regulator into forced continuous mode when dynamically slewing the DAC voltage reference down. When the LTC3589 step-down switching regulators are in Burst Mode operation, they automatically switch between fi xed frequency pulse-skipping operation and hysteretic Burst Mode control as a function of the load current ...
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... LTC3589 OPERATION Soft-Start Soft-start is accomplished by gradually increasing the input reference voltage on each step-down switching regulator from 0V to the dynamic reference DAC output level at a rate of 2mV/μs. This allows each output to rise slowly, helping minimize inrush current required to charge up the regulator output capacitor. A soft-start cycle oc- curs whenever a regulator is enabled either initially or while powering up following a fault condition ...
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... OPERATION Operating Frequency The switching frequency of each of the LTC3589 step- down switching regulators may be independently set using command register bits B1DTV2[5], B2DTV2[5] and B3DTV2[5]. The power-on default frequency is 2.25MHz. Writing bit BxDTV2[5] HIGH will reduce the switching fre- quency to 1.125MHz. Selection of the operating frequency is determined by desired effi ...
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... PV pin. Refer to Table 11 for IN recommended ceramic capacitor manufacturers. BUCK-BOOST SWITCHING REGULATOR Output Voltage Programming Set the output voltage of the LTC3589 buck-boost switch- ing regulator using an external resistor divider connected from BB_OUT to the feedback pin BB_FB and to GND as shown in Figure 0.8 • ...
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... Table 9 shows the I C command registers used to control the operating modes of the LTC3589 buck-boost converter. When command register SCR1 bit 6 is LOW, the LTC3589 buck-boost switching regulator operates in a fi xed fre- quency pulse width modulation mode using voltage mode feedback control. A proprietary switching algorithm allows ...
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... If the buck-boost load exceeds the maximum Burst Mode current capability then the output rail will lose regula- tion and the power good comparator will indicate a fault condition. When the LTC3589 buck-boost is not enabled pull down resistor is connected between BB_OUT and ground. Current Limit Operation ...
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... If output short circuit is a possible condition, the inductor should be rated to handle the maximum peak current specifi ed for the buck-boost converter. Table 9 shows several inductors that work well with the LTC3589 buck-boost regulator. Capacitor Selection Low ESR ceramic capacitors should be used at both the output and input supply of the buck-boost switching regulator ...
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... LTC3589 OPERATION SLEWING DAC REFERENCE OPERATION Controlling the DAC References The three LTC3589 step-down switching regulators and linear regulator LDO2 have programmable DAC reference inputs. Each DAC is programmable from 0.3625V to 0.75V in 12.5mV steps • (0.3625 + BxDTVx • 0.0125)(V) OUT R2 The DAC references may be commanded to independently slew between two voltages at one of four selectable slew rates ...
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... B1DTV2[4:0] 10101 10101 PUSHBUTTON OPERATION State Event Diagram Figure 5 shows the LTC3589 pushbutton state diagram. Upon fi rst power application reset circuit puts the pushbutton into power-down (PDN) state and initiates a one second timer. Status pin RSTO is pulled LOW until one second is timed out and the always- alive LDO1 has indicated power good status ...
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... Hard Reset Due to a Fault Condition A hard reset due output rail over temperature condition initiates a hard shutdown of the LTC3589. When the fault occurs, wake is pulled LOW, the I to POR states, enable pin inputs are ignored, and the one second power down timer is started ...
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... EN_LDO2 and EN_LDO3 to enable LDO2, LDO3 and LDO4. Within fi ve seconds of WAKE going HIGH, the microprocessor or microcontroller must drive PWR_ON HIGH to tell LTC3589 that rails are good and to stay in the power-on state. Figure 12 shows the start-up timing for the application shown in Figure 11. There is a 200μ ...
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... INITIAL POWER-UP Figure 13. Initial Power-Up and LDO1 Undervoltage RSTO Timing PGOOD Pin and PGSTAT Status Register Function Each LTC3589 regulator has an internal power good out- put that is active whenever the regulators feedback pin is closer than –8% (typical) from its input reference voltage. ...
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... The LTC3589 under voltage (UV) detection circuit will output a fault condition, locking out regulator operation, until V reaches 2.7V (typical). Once V IN fault threshold the LTC3589 will operate normally until V drops to 2.6V (typical). When V IN fault condition initiates a hard shutdown reset. Figure 15 shows undervoltage warning and fault detection levels. ...
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... When one second timeout and the fault condition are both passed, if PWR_ON is HIGH, WAKE will 3589 F16 come up and the LTC3589 will respond to any enable pins that are also HIGH ...
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... LTC3589, it acknowledges its read address and 8-bit status byte. An acknowledge pulse (active LOW) generated by the LTC3589 lets the master know that the latest byte of informa- tion was transferred. The master generates the clock cycle and releases the SDA line (HIGH) during the acknowledge 2 C device ...
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... C Slave Address The LTC3589 responds to factory programmed read and write addresses. The write address is 0x68. The read ad- dress is 0x69. The LSb of the address byte, known as the read/write bit when writing data to the LTC3589 and 1 when reading from it Sub-Addressed Writing The LTC3589 has 14 command registers for control inputs ...
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... OPERATION Command and Status Registers Table 16 and Table 17 show the LTC3589 I and status registers. System control register (SCR1) sets the operating modes of the switching regulators. Each step-down switching regulator has pulse-skipping, Burst Mode operation, or forced continuous operation. The buck-boost switching regulator can be put in continuous or Burst Mode operation ...
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... LTC3589 OPERATION Table 16. LTC3589 Command Register Table REG NAME B[7] B[6] 0x07 SCR1 Buck-Boost Mode Continuous 1 = Burst Mode 0x10 OVEN Software EN_LDO4 Control Mode Enable with Pin or OVEN Register 1 = Enable/ Disable with OVEN Register Only 0x12 SCR2 Mask LDO4 Startup: PGOOD Hard Shutdown: ...
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... OPERATION Table 16. LTC3589 Command Register Table 0x24 B1DTV2 Keep-Alive Phase Mode: Select Normal 0 = Clock Shutdown Phase Keep-Alive 1 = Clock Phase 2 0x25 VRRCR LDO2 Dynamic Reference Slew Rate 0.88mV/μ 1.75mV/μ 3.5mV/μ 7mV/μs 0x26 B2DTV1 Unused 0x27 B2DTV2 Keep-Alive ...
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... In order to ensure optimal performance and the ability to deliver maximum output power to any regulator critical that the exposed ground pad on the backside of the LTC3589 package be soldered to a ground plane on the board. The exposed pad is the only GND connection for the LTC3589. Correctly soldered to a 2500mm plane on a double sided 1oz copper board the LTC3589 has a thermal resistance (θ ...
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... The decoupling capacitors provide the AC current to the internal power MOSFETs and their drivers important to minimize inductance from the capacitors to the LTC3589 pins. 3. Minimize the switching power traces connecting SW1, SW2, SW3, and buck-boost switch pins SW4AB and SW4CD to the inductors to reduce radiated EMI and parasitic coupling ...
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... The dynamic target voltage (xxDTV[1,2]) registers map to the mandatory command register addresses. The full register map for the LTC3589 shown in Table 15 and Table 16 supports Monahans, hard-coded I start-of-day operation, voltage-change sequence, supply enable, and return-to-D0 state sequence. ...
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... C serial port. OMAP3 and DaVinci Processor Support The OMAP3 family of ARM processors has similar require- ments to the processors described above. The LTC3589 I control can fully accommodate the smart refl ex dynamic voltage control with proper embedded software drivers tailored to the LTC3589 register mapping. The LTC3589 demo board demonstrates confi ...
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... LTC3589 TYPICAL APPLICATION V 10μ RTC 36 1.2V LDO1_STDBY 25mA 511k 1μF 35 LDO1_FB 1.02M LTC3589 18.2k V SRAM 9.09k 10k V SOC 10 10k EN1 11 EN2 13 WAKE EN3 9.09k 14 V EN4 CORE 9 EN_LDO2 10k 18 EN_LDO34 20 PWR_ON PWR_ON 21 ON GND 42 IN 10μ IN1 1μH 7 SW1 ...
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... LTC DWG # 05-08-1728 Rev Ø) 0.70 ±0.05 6.50 ±0.05 5.10 ±0.05 4.50 ±0.05 (4 SIDES) PACKAGE OUTLINE 0.25 ±0.05 0.50 BSC 0.75 ± 0. 0.10 TYP 4.50 REF (4-SIDES) 0.200 REF 0.00 – 0.05 www.DataSheet4U.com LTC3589 R = 0.115 TYP 39 40 0.40 ± 0. PIN 1 NOTCH R = 0.45 OR 0.35 × 45° CHAMFER 4.42 ±0.10 4.42 ±0.10 (UJ40) QFN REV Ø 0406 0.25 ± 0.05 0.50 BSC BOTTOM VIEW— ...
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... LTC3589 TYPICAL APPLICATION RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC3101 1.8V to USB, Multioutput Seamless Transition Between Multiple Input Power Sources, V DC/DC Converter with Low V OUT Loss USB Power Controller 38μA Quiescent Current in Burst Mode Operation 1.8V, 50mA Always-On LDO, Protected 100mA Hot Swap™ ...