LTC693 LINER [Linear Technology], LTC693 Datasheet
LTC693
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LTC693 Summary of contents
Page 1
... Chip Enable output unconditionally write-protects exter- nal memory. In addition, the RESET output is guaranteed to remain logic low even with V The LTC692/LTC693 power the active CMOS RAMs with a charge pumped NMOS power switch to achieve low drop- out and low supply current. When primary power is lost, auxiliary power, connected to the battery input pin, powers the RAMs in standby through an efficient PMOS switch ...
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... S (Notes 1 and 2) V Output Current .................. Short Circuit Protected OUT Power Dissipation............................................. 500mW Operating Temperature Range + 0.3V) LTC692C/LTC693C ............................... OUT LTC692I/LTC693I ............................ – Storage Temperature Range ................ – 150 C Lead Temperature (Soldering, 10 sec)................. 300 (Note 3) ORDER PART NUMBER 1 V BATT ...
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... Short Period V = 0.4V 3. SINK 1.6mA 4.25V SINK SOURCE 1.6mA SINK 4.25V SOURCE CC LTC692/LTC693 MIN TYP MAX 4.50 5.50 2.00 4.00 V – 0.05 V – 0.005 – 0.10 V – 0.005 – 0.50 V – 0.250 – 0.1 V – 0.02 BATT BATT 0 ...
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... OSC Note 5: The LTC692/LTC693 have minimum reset active times of 140ms (200ms typically). The reset active time of the LTC693 can be adjusted (see Table 2 in Applications Information Section). Note 6: The external clock feeding into the circuit passes through the oscillator before clocking the watchdog timer (See BLOCK DIAGRAM). ...
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... Time with Pull-Up Resistor PFO 30pF – 1.315V 1.295V 120 140 160 180 100 LTC692/3 • TPC07 LTC692/LTC693 Power Failure Input Threshold vs Temperature 1.308 1.306 1.304 1.302 1.300 1.298 1.296 1.294 500 –50 – TEMPERATURE (°C) ...
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... Figure 11). The reset active time is adjustable on the LTC693. An external pushbutton reset can be used in connection with the RESET output. See Pushbutton Reset in the Applications Information section. RESET: RESET is an Active High Logic Ouput the inverse of RESET ...
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... In both cases the time-out period immediately after a reset is 1.6 seconds typical CHARGE PUMP – – 1.3V GND – RESET PULSE OSC GENERATOR WATCHDOG TRANSITION TIMER DETECTOR LTC692/LTC693 V OUT BATT ON LOW LINE CE OUT PFO RESET RESET WDO LTC692/3 • ...
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... When operating currents larger than 50mA are required from V OUT ential) is desired, the LTC693 should be used. This prod- uct provides BATT ON output to drive the base of the external PNP transistor (Figure 2). If higher currents are needed with the LTC692, a high current Schottky diode can be connected from the V supply the extra current ...
Page 9
... GND 3V 4 Figure 2. Using BATT ON to Drive External PNP Transistor The LTC692/LTC693 are protected for safe area operation with a short circuit limit. Output current is limited to approximately 200mA. If the device is overloaded for long periods of time, thermal shutdown turns the power switch off until the device cools down. The threshhold tempera- ...
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... V . BATT OUT CC Memory Protection The LTC693 includes memory protection circuitry which ensures the integrity of the data in memory by preventing write operations when invalid level. Two CC additional pins and CE OUT, control the Chip Enable or Write inputs of CMOS RAM. When V follows CE IN with a typical propagation delay of 20ns ...
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... Figure 9. Monitoring Regulated DC Supply with the LTC692/LTC693 Power Fail Comparator W U Power Fail Warning V CC The LTC692/LTC693 generate a Power Failure Output 0.1 F 62512 (PFO) for early warning of failure in the microprocessor's RAM CS power supply. This is accomplished by comparing the GND Power Failure Input (PFI) with an internal 1.3V reference. ...
Page 12
... The reset active time is adjustable on the LTC693. Since many systems cannot service the watchdog timer immediately after a reset, the LTC693 has longer time-out period (1.0 second mini- mum) right after a reset is issued. The normal time-out period (70ms minimum) becomes effective following the ...
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... WDI pin. WDO is also set high when V falls below the reset voltage threshold The LTC693 has two additonal pins OSC SEL and OSC IN, which allow reset active time and watchdog time-out period to be adjusted per Table 2. Several configurations are shown in Figure 12. ...
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... LTC692/LTC693 PPLICATI S I FOR ATIO A Table 2. LTC693 Reset Active Time and Watchdog Time-Out Selections OSC SEL OSC IN Low External Clock Input Low External Capacitor* Floating or High Low Floating or High Floating or High *The nominal internal frequency is 10.24kHz. The nominal oscillator frequency with external capacitor is F ...
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... TYP 0.045 ± 0.015 (1.143 ± 0.381) 0.100 ± 0.010 (2.540 ± 0.254) (0.457 ± 0.076) 45 0.053 – 0.069 (1.346 – 1.752) 0°– 8° TYP 0.014 – 0.019 (0.355 – 0.483) LTC692/LTC693 0 62512 RAM 62128 RAM ...
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... LTC692/LTC693 PACKAGE DESCRIPTIO 0.300 – 0.325 0.130 ± 0.005 (7.620 – 8.255) (3.302 ± 0.127) 0.015 (0.381) MIN 0.009 – 0.015 (0.229 – 0.381) +0.025 0.325 –0.015 0.125 +0.635 (3.175) 8.255 –0.381 MIN 0.291 – 0.299 (7.391 – 7.595) (NOTE 2) 0 ...