M24128-BWMN6 STMicroelectronics, M24128-BWMN6 Datasheet
M24128-BWMN6
Specifications of M24128-BWMN6
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M24128-BWMN6 Summary of contents
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... Supports the I C bus modes: – 400 kHz Fast-mode – 100 kHz Standard-mode ■ Single supply voltages: – 2 5.5 V (M24128-BW) – 1 5.5 V (M24128-BR) – 1 5.5 V (M24128-BF) ■ Write Control input ■ Byte and Page Write ■ Random and Sequential Read modes ■ ...
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... ECC (error correction code) and write cycling . . . . . . . . . . . . . . . . . . . . . 17 4.10 Minimizing system delays by polling on ACK . . . . . . . . . . . . . . . . . . . . . . 18 4.11 Read operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.12 Random Address Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.13 Current Address Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.14 Sequential Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.15 Acknowledge in Read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 2/ Operating supply voltage Power-up conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Device reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Power-down conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Doc ID 16892 Rev 19 M24128-BW, M24128-BR, M24128-BF ...
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... M24128-BW, M24128-BR, M24128-BF 5 Initial delivery state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 6 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 8 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 9 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Doc ID 16892 Rev 19 Contents 3/39 ...
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... UFDFPN8 (MLP8) – 8-lead ultra thin fine pitch dual flat package no lead 2 × 3mm, package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 20. WLCSP, 0.5 mm pitch, package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Table 21. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Table 22. Available M24128 products (package, voltage range, temperature grade Table 23. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 4/39 M24128-BW, M24128-BR, M24128-BF Doc ID 16892 Rev 19 ...
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... M24128-BW, M24128-BR, M24128-BF List of figures Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 2. SO, TSSOP and UFDFPN connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 3. WLCSP connections (top view, marking side, with balls on the underside Figure 4. Device select code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 5. Maximum R value versus bus parasitic capacitance (C) for Figure bus protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 7. ...
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... Description 1 Description The M24128-BW, M24128-BR and M24128-BF devices are I erasable programmable memories (EEPROM). They are organized as 16384 × 8 bits. Figure 1. Logic diagram uses a two-wire serial interface, comprising a bidirectional data line and a clock line. The devices carry a built-in 4-bit device type identifier code (1010) in accordance with the I bus definition ...
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... M24128-BW, M24128-BR, M24128-BF Table 1. Signal names Signal name E0, E1, E2 SDA SCL Figure 2. SO, TSSOP and UFDFPN connections 1. See Package mechanical data Figure 3. WLCSP connections (top view, marking side, with balls on the underside) Function Chip Enable Serial Data Serial Clock Write Control ...
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... Control (WC) is driven high. When unconnected, the signal is internally read as V Write operations are allowed. When Write Control (WC) is driven high, device select and Address bytes are acknowledged, Data bytes are not acknowledged. 8/39 M24128-BW, M24128-BR, M24128-BF indicates how the value of the pull-up resistor can be calculated M24xxx ...
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... M24128-BW, M24128-BR, M24128-BF 2.5 V ground the reference for the V SS 2.6 Supply voltage (V 2.6.1 Operating supply voltage V Prior to selecting the memory and issuing instructions to it, a valid and stable V within the specified [V Table 9). In order to secure a stable DC supply voltage recommended to decouple the ...
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... Bus line capacitor (pF) SDA SDA Start Input Change Condition MSB MSB Doc ID 16892 Rev 19 M24128-BW, M24128-BR, M24128-BF = 1.3 µs (min value for LOW = 400 kHz), the R bus × C bus SCL I²C bus master SDA C Stop Condition ACK 7 8 ...
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... M24128-BW, M24128-BR, M24128-BF Table 2. Device select code Device select code 1. The most significant bit, b7, is sent first. 2. E0, E1 and E2 are compared against the respective external pins on the memory device. Table 3. Address most significant byte b15 b14 Table 4. Address least significant byte ...
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... Memory organization 3 Memory organization The memory is organized as shown in Figure 7. Block diagram SCL SDA 12/39 Figure 7. Control Logic I/O Shift Register Address Register and Counter Doc ID 16892 Rev 19 M24128-BW, M24128-BR, M24128-BF High Voltage Generator Data Register 1 Page X Decoder AI06899 ...
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... M24128-BW, M24128-BR, M24128-BF 4 Device operation The device supports the I data on to the bus is defined transmitter, and any device that reads the data receiver. The device that controls the data transfer is known as the bus master, and the other as the slave device. A data transfer can only be initiated by the bus master, which will also provide the serial clock for synchronization ...
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... Doc ID 16892 Rev 19 M24128-BW, M24128-BR, M24128- bus. Each one is given a th bit time. If the device does not match Initial sequence Start, device select Start, device select Address reStart, device select Similar to Current or Random Address Read Start, device select ...
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... M24128-BW, M24128-BR, M24128-BF Figure 8. Write mode sequences with (data write inhibited) WC Byte Write WC Page Write WC (cont'd) Page Write (cont'd) ACK ACK Dev select Byte address Byte address R/W ACK ACK Dev select Byte address Byte address R/W NO ACK NO ACK Data in N Doc ID 16892 Rev 19 ...
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... NoAck. After each byte is transferred, the internal byte address counter (inside the page) is incremented. The transfer is terminated by the bus master generating a Stop condition. 16/39 M24128-BW, M24128-BR, M24128-BF , and the successful completion of a Write operation, W Figure ...
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... It is therefore recommended to write by packets of 4 bytes in order to benefit from the larger amount of write cycles. All M24128 devices are qualified at 1 million (1 000 000) write cycles; the new M24128 devices offering the ECC improvement are qualified using a cycling routine that writes to the device by multiples of 4-byte words ...
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... Stop Data for the Write operation Continue the Write operation , but the typical time is shorter. To make use of this, a polling sequence can Figure 10, is: Doc ID 16892 Rev 19 M24128-BW, M24128-BR, M24128-BF YES Send address and receive ACK NO Start YES condition Device select with ...
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... M24128-BW, M24128-BR, M24128-BF Figure 11. Read mode sequences Current Address Read Random Address Read Sequential Current Read Sequential Random Read 1. The seven most significant bits of the device select code of a Random Read (in the 1 be identical. ACK NO ACK Dev select Data out R/W ...
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... For all Read commands, the device waits, after each byte read, for an acknowledgment th during the 9 bit time. If the bus master does not drive Serial Data (SDA) low during this time, the device terminates the data transfer and switches to its Standby mode. 20/39 M24128-BW, M24128-BR, M24128-BF Figure 11. Doc ID 16892 Rev 19 ...
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... M24128-BW, M24128-BR, M24128-BF 5 Initial delivery state The device is delivered with all bits in the memory array set to 1 (each byte contains FFh). 6 Maximum rating Stressing the device outside the ratings listed in the device. These are stress ratings only, and operation of the device at these, or any other conditions outside those indicated in the Operating sections of this specification, is not implied ...
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... Ambient operating temperature (device grade 5) Table 10. AC test measurement conditions Symbol C Load capacitance L Input rise and fall times Input levels Input and output timing reference levels 22/39 M24128-BW, M24128-BR, M24128-BF Parameter Parameter Parameter Parameter Doc ID 16892 Rev 19 Min. Max. Unit 2.5 5.5 V – ...
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... M24128-BW, M24128-BR, M24128-BF Figure 12. AC test measurement I/O waveform Table 11. Input parameters Symbol C Input capacitance (SDA Input capacitance (other pins input impedance WCL ( input impedance WCH Pulse width ignored ( (Input filter on SCL and SDA) 1. Characterized only. Table 12. DC characteristics (M24xxx-W, device grade 6) ...
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... Input high voltage (WC, E0, E1, E2) V Output low voltage the application uses the M24128-BR at 2.5 V < V characteristics (M24xxx-W, device grade 6) 2. Characterized value, not tested in production. 3. The device is not selected after power-up, after a Read command (after the Stop condition) or after the completion of the ...
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... M24128-BW, M24128-BR, M24128-BF Table 15. DC characteristics (M24xxx-F) Symbol Input leakage current I LI (SCL, SDA, E2, E1, E0) I Output leakage current LO I Supply current (Read Supply current (Write) CC0 I Standby supply current CC1 Input low voltage (SDA, SCL WC) Input high voltage (SCL, SDA) ...
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... Start condition hold time Stop condition set up time Time between Stop condition and next Start condition Write time × C time constant is within the values specified in bus bus Doc ID 16892 Rev 19 M24128-BW, M24128-BR, M24128-BF 7, Table 8 and Table 9 Min. Max. 400 600 1300 ...
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... M24128-BW, M24128-BR, M24128-BF Figure 13. AC waveforms Doc ID 16892 Rev 19 DC and AC parameters 27/39 ...
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... Doc ID 16892 Rev 19 M24128-BW, M24128-BR, M24128- 45˚ c 0.25 mm GAUGE PLANE SO-A (1) inches Typ Min 0.0039 0.0492 0.0110 0.0067 0.1929 0.1890 0.2362 ...
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... M24128-BW, M24128-BR, M24128-BF Table 17. SO8 narrow – 8 lead plastic small outline, 150 mils body width, package mechanical data Symbol Values in inches are converted from mm and rounded to 4 decimal digits. Figure 15. TSSOP8 – 8 lead thin shrink small outline, package outline Drawing is not to scale. ...
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... Doc ID 16892 Rev 19 M24128-BW, M24128-BR, M24128-BF (1) inches Typ. Min. 0.0394 0° UFDFPN- should not be SS (1) inches Typ Min 0.0217 0.0197 ...
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... M24128-BW, M24128-BR, M24128-BF Table 19. UFDFPN8 (MLP8) – 8-lead ultra thin fine pitch dual flat package no lead 2 × 3mm, package mechanical data Symbol Values in inches are converted from mm and rounded to 4 decimal digits. Figure 17. WLCSP, 0.5 mm pitch, package outline Drawing is not to scale. ...
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... WLCSP, 0.5 mm pitch, package mechanical data Symbol Typ. e3 0.443 F 0.257 G 0.4025 ( Values in inches are converted from mm and rounded to 4 decimal digits the total number of terminals. 32/39 M24128-BW, M24128-BR, M24128-BF millimeters Min. Max. Typ. 0.0174 0.0101 0.0158 8 Doc ID 16892 Rev 19 (1) inches Min. Max. ...
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... M24128-BW, M24128-BR, M24128-BF 9 Part numbering Table 21. Ordering information scheme Example: Device type 2 M24 = I C serial access EEPROM Device function 128–B = 128 Kbit (16384 x 8) Operating voltage Package MN = SO8 (150 mil width TSSOP8 (169 mil width UFDFPN8 (MLP8) ...
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... Part numbering Table 22. Available M24128 products (package, voltage range, temperature grade) Package SO8N (MN) TSSOP8 (DW) MLP8 (MB) WLCSP (CS) 34/39 M24128-BW, M24128-BR, M24128-BF M24128-BF M24128-BR 1 5 Grade 6 - Grade 6 Grade 6 Grade 6 Doc ID 16892 Rev 19 M24128-BW 2 5.5 V Grade 3 Grade 6 Grade ...
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... M24128-BW, M24128-BR, M24128-BF 10 Revision history Table 23. Document revision history Date Revision 22-Dec-1999 28-Jun-2000 31-Oct-2000 20-Apr-2001 16-Jan-2002 02-Aug-2002 04-Feb-2003 27-May-2003 22-Oct-2003 01-Jun-2004 04-Nov-2004 05-Jan-2005 TSSOP8 package in place of TSSOP14 ( OrderingInfo, 2.3 PackageMechData). 2.4 TSSOP8 package data corrected References to Temperature Range 3 removed from Ordering Information 2 ...
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... Table 12: DC characteristics (M24xxx-W, device grade CC1 6). 8 Note 1 added to Table 15: DC characteristics (M24xxx-F) modified. UFDFPN8 package specifications updated (see and M24128-BR part numbers added. 9 Generic part number corrected in I corrected in Table 13 CC0 Packages are ECOPACK® compliant. Available packages and temperature ranges by product specified in ...
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... Section 2.6.4: Power-down conditions Supply voltage (VCC). Updated Figure 5: Maximum RP value versus bus parasitic capacitance (C) for an I2C bus. Replace M24128 and M24C64 by M24128-BFMB6 and M24C64-FMB6, respectively, in Section 4.9: ECC (error correction code) and write cycling. Added temperature grade 6 in F). Updated test conditions for I ...
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... Figure 16: UFDFPN8 (MLP8) – 8-lead ultra thin fine pitch dual flat package no lead 2 × 3mm, package Small text changes. 18 Section 4.9: ECC (error correction code) and write cycling 19 Removed PDIP package. Doc ID 16892 Rev 19 M24128-BW, M24128-BR, M24128-BF Changes on page 1 and in Table 21: updated. parameters. and Table 14 ...
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... M24128-BW, M24128-BR, M24128-BF Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...