MB85RC64 Fujitsu, MB85RC64 Datasheet

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MB85RC64

Manufacturer Part Number
MB85RC64
Description
64 K (8 K x 8) Bit I2C
Manufacturer
Fujitsu
Datasheet

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FUJITSU SEMICONDUCTOR
Copyright©2010-2011 FUJITSU SEMICONDUCTOR LIMITED All rights reserved
2011.6
Memory FRAM
64 K (8 K × 8) Bit I
MB85RC64
■ DESCRIPTION
■ FEATURES
The MB85RC64 is a FRAM (Ferroelectric Random Access Memory) Stand-Alone chip in a configuration of
8,192 words × 8 bits, using the ferroelectric process and silicon gate CMOS process technologies for forming
the nonvolatile memory cells.
The MB85RC64 adopts the two-wire serial interface.
Unlike SRAM, the MB85RC64 is able to retain data without using a data backup battery.
The read/write endurance of the nonvolatile memory cells used for the MB85RC64 has improved to be at
least 10
The MB85RC64 does not need a polling sequence after writing to the memory such as the case of Flash
memory nor E
• Bit configuration
• Operating power supply voltage : 2.7 V to 3.6 V
• Operating frequency
• Two-wire serial interface
• Operating temperature range
• Data retention
• Read/write endurance
• Package
• Low power consumption
DATA SHEET
10
cycles, significantly out performing Flash memory and E
2
PROM.
: 8,192 words × 8 bits
: 400 kHz (Max)
: I
: − 40 °C to +85 °C
: 10 years ( + 75 °C)
: 10
: Plastic / SOP, 8-pin (FPT-8P-M02)
: Operating current 0.15 mA (Max: @400 kHz), Standby current 5 μA (Typ)
Fast-mode.
Fully controllable by two ports: serial clock (SCL) and serial data (SDA).
2
C-bus specification ver. 2.1 compliant, supports Standard-mode/
10
times
2
C
2
PROM in the number.
DS05–13109–3E

Related parts for MB85RC64

MB85RC64 Summary of contents

Page 1

... The read/write endurance of the nonvolatile memory cells used for the MB85RC64 has improved least 10 10 cycles, significantly out performing Flash memory and E The MB85RC64 does not need a polling sequence after writing to the memory such as the case of Flash memory nor E 2 PROM. ...

Page 2

... Pin Pin Name Number Device Address pins The MB85RC64 can be connected to the same data bus devices. Device addresses are used in order to identify each of the devices. Connect these pins to VDD pin or VSS pin externally. Only if the combination of VDD and VSS pins matches a device, an address and a code inputted from the SDA pin, the device operates ...

Page 3

... WP A0, A1, A2 ■ (Inter-Integrated Circuit) The MB85RC64 has the two-wire serial interface; the I 2 The I C bus defines communication roles of “master” and “slave” devices, with the master side holding the authority to initiate control. Furthermore connected to multiple slave devices in a party-line configuration. In this case necessary to assign a unique device address to the slave device. • ...

Page 4

... Stop Condition Set the SDA input from Low to High while the SCL input is in High in order to terminate the I nication. Because the MB85RC64 does not need the writing wait time unlike E state immediately after the stop condition input. • Start Condition, Stop Condition ...

Page 5

... Acknowledge timing overview diagram 1 SCL SDA The transmitter side should always release SDA on the 9th bit. At this time, the receiver side outputs a pull-down Start to indicate a successful byte transfer (ACK response). DS05–13109– MB85RC64 9 ACK 5 ...

Page 6

... Following the device type code, the 3 bits of the device address code are input in order of A2, A1, and A0. Each MB85RC64 is given a unique 3bits code on the device address pin (external hardware pin A2, A1, and A0). When the device address code is received by the slave device, the slave only responds if the hardware device address of which is equal to its unique 3bits code. • ...

Page 7

... S ■ FRAM ACKNOWLEDGE -- POLLING NOT REQUIRED The MB85RC64 performs write operations at the same speed as read operations, so any waiting time for an ACK polling* does not occur. The write cycle takes no additional time PROM, the Acknowledge Polling is performed as a progress check in the write programming step. ...

Page 8

... S High 8bits Note : In the MB85RC64, input “000” as the upper 3 bits of the MSB. • Page Write If additional 8bits are sent after the same command as Byte Write, a page write is performed. If more bytes are sent than will fit up to the end of the address, the address rolls over to 0000 8KBytes are sent, the data is overwritten in order starting from the start of the FRAM memory address that was written first ...

Page 9

... High 8bits DS05–13109–3E (n+1) address Read Data 8bits Address Low 8bits MB85RC64 Access from master Access from slave S Start Condition Stop Condition P A ACK NACK N n address Read ...

Page 10

... MB85RC64 • Sequential Read Data can be received continuously following the control byte after specifying the address the same as for Random Read. If the read reaches the end of address for the MB85RC64, the internal read address auto- matically rolls over to 0000 . H ... Read A Data 8bits 10 ...

Page 11

... V IN − 0.5 V OUT − − 40 Tstg Value Symbol Min Typ V 2.7 3.3 CC × 0.8 ⎯ − 0.5 ⎯ − 40 ⎯ MB85RC64 Unit Max +4 0.5 ( ≤ 4. 0.5 ( ≤ 4. °C + 125 °C Unit Max 3 0 ≤ 4. °C 11 ...

Page 12

... MB85RC64 ■ ELECTRICAL CHARACTERISTICS 1. DC Characteristics Parameter Input leakage current Output leakage current Operating power supply current Standby current “L” level output voltage 2. AC Characteristics Parameter SCL clock frequency Clock high time Clock low time SCL/SDA rise time SCL/SDA fall time ...

Page 13

... DH:DAT Valid 1/FSCL Conditions = OUT MHz °C A 3.3 V Output 100 pF MB85RC64 Stop Stop Start buf Value Unit Min Typ Min ⎯ ...

Page 14

... MB85RC64 ■ POWER ON SEQUENCE tpd (Min (Max × 0.8 * SDA, SCL >V SDA, SCL SDA, SCL (Max) < Parameter SDA, SCL level hold time during power down SDA, SCL level hold time during power up Power supply rise time ■ ...

Page 15

... ORDERING INFORMATION Part number MB85RC64PNF-G-JNE1 MB85RC64PNF-G-JNERE1 DS05–13109–3E Package 8-pin, plastic SOP (FPT-8P-M02) 8-pin, plastic SOP (FPT-8P-M02) MB85RC64 Remarks Embossed Carrier tape 15 ...

Page 16

... MB85RC64 ■ PACKAGE DIMENSION 8-pin plastic SOP (FPT-8P-M02) 8-pin plastic SOP (FPT-8P-M02) +0.25 +.010 1 * 5.05 .199 –0.20 –.008 1.27(.050) 0.44±0.08 (.017±.003) 0.10(.004) 0.10(.004) 2002-2010 FUJITSU SEMICONDUCTOR LIMITED F08004S-c-4-9 C Please check the latest package dimension at the following URL. ...

Page 17

... MEMO DS05–13109–3E MB85RC64 17 ...

Page 18

... MB85RC64 MEMO 18 DS05–13109–3E ...

Page 19

... MEMO DS05–13109–3E MB85RC64 19 ...

Page 20

... MB85RC64 FUJITSU SEMICONDUCTOR LIMITED Nomura Fudosan Shin-yokohama Bldg. 10-23, Shin-yokohama 2-Chome, Kohoku-ku Yokohama Kanagawa 222-0033, Japan Tel: +81-45-415-5858 http://jp.fujitsu.com/fsl/en/ For further information please contact: North and South America FUJITSU SEMICONDUCTOR AMERICA, INC. 1250 E. Arques Avenue, M/S 333 Sunnyvale, CA 94085-5401, U.S.A. Tel: +1-408-737-5600 Fax: +1-408-737-5999 http://us ...

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