MC10EP29 ON Semiconductor, MC10EP29 Datasheet

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MC10EP29

Manufacturer Part Number
MC10EP29
Description
3.3V / 5V ECL Dual Differential Data and Clock D Flip-Flop
Manufacturer
ON Semiconductor
Datasheet

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MC10EP29, MC100EP29
3.3V / 5V ECL Dual
Differential Data and Clock
D Flip−Flop With Set and
Reset
Description
features fully differential Data and Clock inputs as well as outputs.
T h e M C 1 0 / 1 0 0 E P 2 9 i s f u n c t i o n a l l y e q u i v a l e n t t o t h e
MC10/100EL29. Data enters the master latch when the clock is LOW
and transfers to the slave upon a positive transition on the clock input.
stability under open input conditions. When both differential inputs
are left open the D input will pull down to V
bias around V
state will be random based on how the flip flop powers up.
inputs. Note that the Set and Reset inputs cannot both be HIGH
simultaneously.
this device only. For single-ended input conditions, the unused
differential input is connected to V
V
and V
to 0.5 mA. When not used, V
Features
© Semiconductor Components Industries, LLC, 2006
December, 2006 − Rev. 4
BB
The MC10/100EP29 is a dual master−slave flip−flop. The device
The differential inputs have special circuitry which ensures device
Both flip flops feature asynchronous, overriding Set and Reset
The V
The 100 Series contains temperature compensation.
with V
with V
Maximum Frequency > 3 GHz Typical
500 ps Typical Propagation Delays
PECL Mode Operating Range: V
NECL Mode Operating Range: V
Open Input Default State
Safety Clamp on Inputs
These are Pb−Free Devices
may also rebias AC coupled inputs. When used, decouple V
CC
BB
via a 0.01 mF capacitor and limit current sourcing or sinking
EE
EE
pin, an internally generated voltage supply, is available to
= −3.0 V to −5.5 V
= 0 V
CC
/2. The outputs will go to a defined state, however the
BB
should be left open.
BB
CC
CC
as a switching reference voltage.
= 3.0 V to 5.5 V
= 0 V
EE
and the D input will
1
BB
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
*For additional marking information, refer to
(Note: Microdot may be in either location)
Application Note AND8002/D.
CASE 948E
MN SUFFIX
CASE 485E
DT SUFFIX
TSSOP−20
QFN−20
ORDERING INFORMATION
xxx
A
L
Y
W
G
http://onsemi.com
= MC10 or 100
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
Publication Order Number:
1
DIAGRAM*
MARKING
20
ALYWG
XXXX
EP29
ALYWG
MC10EP29/D
XXXX
EP29
G
G

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MC10EP29 Summary of contents

Page 1

... MC10EP29, MC100EP29 3. ECL Dual Differential Data and Clock D Flip−Flop With Set and Reset Description The MC10/100EP29 is a dual master−slave flip−flop. The device features fully differential Data and Clock inputs as well as outputs MC10/100EL29 ...

Page 2

Warning: All V to Power Supply to guarantee proper operation. Figure 1. 20−Lead Pinout (Top View) and Logic Diagram V BB CLK0 CLK0 CLK1 CLK1 NOTE: The Exposed Pad ...

Page 3

Table 3. ATTRIBUTES Internal Input Pulldown Resistor Internal Input Pullup Resistor ESD Protection Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Flammability Rating Transistor Count Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see ...

Page 4

Table 5. 10EP DC CHARACTERISTICS, PECL Symbol Characteristic I Power Supply Current EE V Output HIGH Voltage (Note Output LOW Voltage (Note Input HIGH Voltage (Single−Ended Input LOW Voltage (Single−Ended ...

Page 5

Table 7. 10EP DC CHARACTERISTICS, NECL Symbol Characteristic I Power Supply Current EE VOH Output HIGH Voltage (Note 9) V Output LOW Voltage (Note Input HIGH Voltage (Single−Ended Input LOW Voltage (Single−Ended Output ...

Page 6

Table 9. 100EP DC CHARACTERISTICS, PECL Symbol Characteristic I Power Supply Current EE V Output HIGH Voltage (Note 15 Output LOW Voltage (Note 15 Input HIGH Voltage (Single−Ended Input LOW Voltage (Single−Ended ...

Page 7

Table 11. AC CHARACTERISTICS V Symbol Characteristic f Maximum Frequency max (See Figure 2 F /JITTER) max t , Propagation Delay to PLH t Output Differential S PHL R t Setup Time S t Hold Time Set/Reset ...

Page 8

... Figure 3. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D − Termination of ECL Logic Devices.) ORDERING INFORMATION Device MC10EP29DT MC10EP29DTG MC10EP29DTR2 MC10EP29DTR2G MC10EP29MNG MC10EP29MNTXG MC100EP29DT MC100EP29DTG MC100EP29DTR2 MC100EP29DTR2G MC100EP29MNG MC100EP29MNTXG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D ...

Page 9

Resource Reference of Application Notes AND8020/D − Termination of ECL Logic Devices AND8066/D − Interfacing with ECLinPS AND8090/D − AC Characteristics of ECL Devices http://onsemi.com 9 ...

Page 10

... 0.100 (0.004) −T− SEATING PLANE 16X 0.36 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS TSSOP−20 CASE 948E−02 ISSUE ...

Page 11

... G 0.50 BSC 0.020 BSC H 1.38 1.43 0.054 0.056 J 0.20 REF 0.008 REF K 0.00 0.05 0.000 0.002 L 0.35 0.45 0.014 0.018 M 2.00 BSC 0.079 BSC N 2.00 BSC 0.079 BSC P 1.38 1.43 0.054 0.056 R 0.60 0.80 0.024 0.031 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative MC10EP29/D ...

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