MC33910 Freescale Semiconductor, MC33910 Datasheet

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MC33910

Manufacturer Part Number
MC33910
Description
LIN System Basis Chip
Manufacturer
Freescale Semiconductor
Datasheet

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Freescale Semiconductor
Advance Information
* This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2007. All rights reserved.
LIN System Basis Chip with
2x60mA High Side Drivers
Basis Chip (SBC), that combines many frequently used functions in
an MCU-based system, plus a Local Interconnect Network (LIN)
transceiver. It has a 5.0V, 60mA low dropout regulator with full
protection and reporting features. The device provides full SPI-
readable diagnostic and a selectable timing watchdog for detecting
errant operation. The LIN Protocol Specification, version 2.0
compliant LIN transceiver has waveshaping circuitry that can be
disabled for higher data rates.
(PWM) are implemented to drive small loads. One high voltage input
is available for use in contact monitoring or as external wake-up input.
This input can be used as high voltage Analog Input as well. The
voltage on this pin is divided by a selectable ratio and available via an
analog multiplexer.
available); Sleep (V
sense and forced wake-up) and Stop (V
capability, wake-up via CS, LIN bus, wake-up input, cyclic sense,
forced wake-up and external reset).
Features
The 33910 is a Serial Peripheral Interface (SPI)-controlled System
Two 60mA high side switches with optional pulse-width modulation
The 33910 has three main operating modes: Normal (all functions
The 33910 is compatible with LIN Protocol Specification 2.0.
• Two 60mA high side switches
• One high voltage analog/logic input
• Full-duplex SPI at frequencies up to 4MHz
• LIN transceiver capable of up to 100kbps with wave shaping
• Configurable window watchdog
• 5.0V low drop regulator with fault detection and low voltage
• Switched/protected 5.0V output (used for Hall sensors)
• Pb-free packaging designated by suffix code AC
reset (LVR) circuitry
DD
off, wake-up via LIN, wake-up input (L1), cyclic
V
BAT
MCU
Figure 1. 33910 Simplified Application Diagram
DD
on with limited current
VS1
VS2
VDD
PWMIN
ADOUT0
MOSI
MISO
SCLK
CS
RXD
TXD
IRQ
RST
33910
WDCONF
VSENSE
HVDD
HS1
HS2
LIN
L1
MC33910BAC/R2
MC34910BAC/R2
Device
LIN INTERFACE
SYSTEM BASIS CHIP WITH LIN
ORDERING INFORMATION
AC SUFFIX (Pb-FREE)
2
ND
- 40°C to 125°C
98ASH70029A
Document Number: MC33910
- 40°C to 85°C
Temperature
32-PIN LQFP
33910
GENERATION
Range (T
A
)
Rev. 4.0, 2/2008
Package
32-LQFP

Related parts for MC33910

MC33910 Summary of contents

Page 1

... VS2 VDD PWMIN ADOUT0 MCU MOSI MISO SCLK CS RXD TXD IRQ RST WDCONF Figure 1. 33910 Simplified Application Diagram Document Number: MC33910 Rev. 4.0, 2/2008 33910 SYSTEM BASIS CHIP WITH LIN ND 2 GENERATION AC SUFFIX (Pb-FREE) 98ASH70029A 32-PIN LQFP ORDERING INFORMATION Temperature Device Range (T ) ...

Page 2

... Figure 2. 33910 Simplified Internal Block Diagram VS1 VDD AGND VOLTAGE REGULATOR PGND 5V OUTPUT HVDD MODULE VS2 HIGH SIDE HS1 CONTROL VS2 MODULE HS2 V BAT VSENSE SENSE MODULE CHIP TEMPERATURE SENSE MODULE L1 ANALOG INPUT MODULE DIGITAL INPUT MODULE LIN Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 3

... TXD 3 MISO 4 MOSI 5 SCLK ADOUT0 8 PWMIN 9 RST 10 IRQ 11, 15-17, NC 19-22, 28 Analog Integrated Circuit Device Data Freescale Semiconductor PIN CONNECTIONS RXD 1 TXD 2 MISO 3 MOSI 4 SCLK Special Configuration Recommended / Mandatory for Marked NC Pins PWMIN 8 Figure 3. 33910 Pin Connections Functional Pin Description ...

Page 4

... Hall Sensor Supply +5.0V switchable supply output pin. Output Voltage Regulator +5.0V main voltage regulator output pin. Output This pin is the device analog ground connection. Analog Ground Pin section beginning on page 20. Definition ( addition, L1 can be sensed (2) (3) (4) (5) Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 5

... Testing is performed in accordance with the Human Body Model ( 0Ω), and the Charge Device Model, Robotic (C ZAP 9. Special configuration recommended / mandatory for marked NC pins. Please refer to the typical application shown on page 40. Analog Integrated Circuit Device Data Freescale Semiconductor ELECTRICAL CHARACTERISTICS MAXIMUM RATINGS Ratings Ω resistor (DC) (9) ...

Page 6

... Ratings (10) 33910 34910 (10) (11), (12) (11), (13) (14) (15), (16) Symbol Value T A -40 to 125 - -40 to 150 J T -55 to 150 STG °C/W R θ °C θJC T Note 16 PPRT Analog Integrated Circuit Device Data Freescale Semiconductor Unit °C °C °C °C ...

Page 7

... Stop and Sleep Mode currents will increase if V 21. This parameter is guaranteed by process monitoring but, not production tested. 22. The flag is set during power up sequence. To clear the flag, a SPI read must be performed. Analog Integrated Circuit Device Data Freescale Semiconductor STATIC ELECTRICAL CHARACTERISTICS ≤ 18V, -40°C ≤ T SUP (17) = 13.5V) ...

Page 8

... HVDD H VDDDROP – 160 300 LR HVDD – HVDD – ≤ Ω. ESR 10 ≤ Ω. 10 Analog Integrated Circuit Device Data Freescale Semiconductor ≤ 85°C for the A Unit °C – °C °C – ° ...

Page 9

... DD OUT PULSE WIDTH MODULATION INPUT PIN (PWMIN) Low-state Input Voltage High-state Input Voltage Pull-up current 0 < V < 3.5V IN Analog Integrated Circuit Device Data Freescale Semiconductor ≤ 18V, -40°C ≤ T SUP ≤ 27V < 3.5V) OUT I ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS ≤ 125°C for the 33910 and -40°C ≤ 25° ...

Page 10

... R 800 1550 L1IN RATIO L1 0.95 1.0 1.05 3.42 3.6 3.78 V RATIOL1- OFFSET -80 0.0 80 -22 0.0 22 MATCHING 96 100 104 96 100 104 = 150°C. J Analog Integrated Circuit Device Data Freescale Semiconductor ≤ 85°C for the A Unit Ω µA V – °C – ° µA – kΩ ...

Page 11

... Low-state Input Voltage High-state Input Voltage Pin Pull-up Current, 0 < V < 3.5V IN Notes 35. Watchdog timing period calculation formula: t Analog Integrated Circuit Device Data Freescale Semiconductor ≤ 18V, -40°C ≤ T ≤ 125°C for the 33910 and -40°C ≤ T SUP A Symbol R EXT WD ACC ...

Page 12

... V HYS – – 0.175 V -1 LIN_REC SUP – – – 1.1 1.4 – 1 SLAVE T 150 165 180 LINSD – 10 – Analog Integrated Circuit Device Data Freescale Semiconductor ≤ 85°C for the Unit mA mA µA mA µA V SUP V kΩ °C °C ...

Page 13

... External Resistor R = 200kΩ (1%) EXT Without External Resistor R Notes 38. This parameter is guaranteed by process monitoring but, not production tested. 39. Watchdog timing period calculation formula: t Analog Integrated Circuit Device Data Freescale Semiconductor DYNAMIC ELECTRICAL CHARACTERISTICS ≤ 18V, -40°C ≤ T SUP Characteristic ) (38) (38) (38) (38) ...

Page 14

... N/A WUSPI t 4.0 — — (42), (43) D1 0.396 — — D2 — — 0.581 (42),(44) D3 0.417 — — D4 — — 0.590 Analog Integrated Circuit Device Data Freescale Semiconductor ≤ 85°C for the Unit µs µs ms µs µs µs µs µs µs µs ...

Page 15

... The delay depends of the load and capacitor on V 49. In Stop Mode, the delay is measured between the bus wake-up threshold (V page 18. 50. This parameter is guaranteed by process monitoring but, not production tested. Analog Integrated Circuit Device Data Freescale Semiconductor ≤ 18V, -40°C ≤ T SUP Characteristic (45) (46) =max (t ...

Page 16

... C0 C0 Figure 6. Test Circuit for LIN Timing Measurements TRANSIENT PULSE GENERATOR ( ) NOTE GND TRANSIENT PULSE GENERATOR (NOTE) GND R0 AND C0 COMBINATIONS: • 1.0KΩ and 1.0nF • 660Ω and 6.8nF • 500Ω and 10nF Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 17

... TXD V LIN_REC t LIN www.DataSheet4U.com t - MAX DOM RXD TXD V LIN_REC t LIN t - MAX DOM RXD Analog Integrated Circuit Device Data Freescale Semiconductor t BIT t (MAX) BUS_DOM t - MAX REC - MIN DOM 58.1% V SUP 40.0% V SUP 28.4% V SUP t - MIN REC t t RDOM RREC Figure 7. LIN Timing Measurements for Normal Slew Rate ...

Page 18

... LIN_REC IRQ 33910 18 LIN BUS SIGNAL t t RX_PDF RX_PDR Figure 9. LIN Receiver Timing LIN 0.4 V SUP DOMINANT LEVEL t WL PROP Figure 10. LIN Wake-up Sleep Mode Timing LIN 0.4 V SUP DOMINANT LEVEL t WL PROP V SUP t WAKE t WAKE Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 19

... V SUP V www.DataSheet4U.com RST CS t LEAD SCLK MOSI UNDEFINED t VALID t SOEN MISO Analog Integrated Circuit Device Data Freescale Semiconductor Figure 11. LIN Wake-up Stop Mode Timing DD t NRTOUT t RST Figure 12. Power On Reset and Normal Request Time-Out Timing t PSCLK t WSCLKH t WSCLKL t t SISU SIH D0 DON’ ...

Page 20

... The RST pin is an active low filtered input and output formed by a weak pull-up and a switchable pull-down structure which allows this pin to be shorted either GND during software development without the risk of destroying the driver Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 21

... When the L1 input is not selected in the analog multiplexer, the voltage divider is disconnected from that input. Analog Integrated Circuit Device Data Freescale Semiconductor FUNCTIONAL DESCRIPTION FUNCTIONAL PIN DESCRIPTION HIGH SIDE OUTPUTS (HS1 AND HS2) These high side switches are able to drive loads such as relays or lamps ...

Page 22

... The 33910 is providing its control and status information through a standard 8-Bit SPI interface. Critical system events such as Low- or High-voltage/Temperature conditions as well 33910 22 FUNCTIONAL INTERNAL BLOCK DESCRIPTION MC33910 - Functional Block Diagram Integrated Supply Analog Circuitry MCU Interface and Output Control SPI Interface Reset & IRQ Logic ...

Page 23

... Normal Mode after the Reset Mode. If the WDCONF pin is open, the 33910 stays typically for 150ms in Normal Request before entering in Normal Mode. Analog Integrated Circuit Device Data Freescale Semiconductor FUNCTIONAL DEVICE OPERATIONS OPERATIONAL MODES NORMAL MODE In Normal Mode, all 33910 functions are active and can be controlled by the SPI and the PWMIN pin ...

Page 24

... Normal Request Timeout Expired ( Power Up RESET DELAY (t RESET V LOW (>t ) EXPIRED DD NRTOUT AND VSUV = 0 WAKE-UP (RESET) V LOW DD Figure 15. Operating Modes and Transitions ) NRTOUT V LOW DD HIGH AND ) EXPIRED NORMAL RST REQUEST V LOW DD NORMAL WD FAILED SLEEP COMMAND STOP SLEEP Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 25

... Signals when the supply line (VS1) voltage drops below the VSUV threshold ( ). V SUV High Voltage Interrupt Signals when the supply line (VS1) voltage increases above the VSOV threshold ( Analog Integrated Circuit Device Data Freescale Semiconductor Normal Reset Mode Normal Request Mode Mode full full (51) - SPI ...

Page 26

... Wake-up from L1 input without cyclic sense • Cyclic sense wake-up inputs • Force wake-up • CS wake-up • LIN wake-up • RST wake-up From Sleep Mode, the following wake-up events can be configured: • Wake-up from L1 input without cyclic sense Analog Integrated Circuit Device Data PROPWL Freescale Semiconductor ...

Page 27

... To disable the watchdog function in Normal Mode the user must connect the WDCONF pin to ground. This measure Analog Integrated Circuit Device Data Freescale Semiconductor effectively disables Normal Request Mode. The WDOFF bit in the WDSR will be set. This condition is only detected during Reset Mode. ...

Page 28

... Sleep And Stop Mode The high side driver can be enabled to operate in Sleep and Stop Mode for cyclic sensing. Also see Operating Modes PWMIN VS2 HSx Table 5, Overview. Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 29

... To improve performance and for safe behavior in case of LIN bus short to ground or LIN bus leakage during Low Power Analog Integrated Circuit Device Data Freescale Semiconductor • LIN dominant voltage level selection The LIN driver is a low side MOSFET with over-current and thermal shutdown. An internal pull-up resistor with a serial diode structure is integrated external pull-up components are required for the application in a Slave Mode ...

Page 30

... LIN bus line. A dominant level longer than t PROPWL edge will generate a system wake-up (Reset) and will be reported in the ISR. Also see Figure 10, page 18. Analog Integrated Circuit Device Data Freescale Semiconductor followed by a rising followed by a rising ...

Page 31

... The data transfer is only valid if exactly 8 sample clock edges are present during the active (low) phase of Analog Integrated Circuit Device Data Freescale Semiconductor LOGIC COMMANDS AND REGISTERS The master sends 4 bits of address (A3:A0 bits of control Figure ...

Page 32

... VDDOT BATFAIL VDDOT BATFAIL - L1WE - LSR1 LSR0 LINOT LINOC LINOT LINOC HS2 HS1 HS1OP HS1CL HS1OP HS1CL WD1 WD0 CYST1 CYST0 WDOFF WDWO WDOFF WDWO MX1 MX0 - - LINM VMM ISR1 ISR0 ISR1 ISR0 Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 33

... This read-only bit indicates that one or more bits in the LIN status register (LINSR) are set LIN Status bit set 0 = None LINOC LINOT TXDOM RXSHORT Figure 21. LIN Status Analog Integrated Circuit Device Data Freescale Semiconductor HSS - High Side Switch Status HSSR are set LINS HSS –. Mode Control Register - MCR and to configure the 33910 ...

Page 34

... Table 13. Wake-up Status Register - $2/$ Read - - - This read-only bit indicates the status of the L1 input. If the After a wake-up form Stop or Sleep Mode this bit also Wake-up Wake-up disabled or selected as analog input. Analog Integrated Circuit Device Data Freescale Semiconductor C0 L1WE ...

Page 35

... Normal Slew Rate (up to 20kb/ Fast Slew Rate (up to 100kb/ Analog Integrated Circuit Device Data Freescale Semiconductor LIN Status Register - LINSR interface block and is also returned when writing to the LIN control register (LINCR RXONLY LSR1 LSR0 0 ...

Page 36

... This write-only bits selects the divider for the watchdog Table 20. This configuration is valid only if WD2 WD1 WD0 Prescaler Divider Analog Integrated Circuit Device Data Freescale Semiconductor C0 WD0 CYST0 ...

Page 37

... Any access to this register or the TIMCR will clear the WDTO bit. Analog Integrated Circuit Device Data Freescale Semiconductor 1 = Last reset caused by watchdog timeout 0 = None WDERR - Watchdog Error This read-only bit signals the detection of a missing watchdog resistor ...

Page 38

... Reserved CYSX8 - Cyclic Sense Timing x 8 Reserved This write-only bit influences the Cyclic Sense period as Reserved shown Multiplier enabled 0 = None CYSX8 POR, Reset Mode or POR POR POR ext_reset Table 21. Analog Integrated Circuit Device Data Freescale Semiconductor 0 0 ...

Page 39

... Analog Integrated Circuit Device Data Freescale Semiconductor VMM - Voltage Monitor Interrupt Mask the voltage monitor block. The only maskable interrupt in the voltage monitor block is the V Interrupt Source Register - ISR the last interrupt or wake-up respectively. A read of the register acknowledges the interrupt and leads IRQ pin to ...

Page 40

... Pin 15, 16, 17, 19, 20, 21 GND Pin 11 = open (floating) Pin 28 = this pin is not internally connected and may be used for PCB routing optimization. V BAT AGND HVDD Hall Sensor Supply R1 HS1 HS2 VSENSE R2 L1 LIN LIN C6 Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 41

... Important For the most current revision of the package, visit Available Documentation column select Packaging Information. www.DataSheet4U.com Analog Integrated Circuit Device Data Freescale Semiconductor PACKAGING PACKAGE DIMENSIONS www.Freescale.com and select Documentation, then under AC SUFFIX (PB-FREE) 32-PIN LQFP 98ASH70029A REVISION D PACKAGING PACKAGE DIMENSIONS ...

Page 42

... IMPORTANT FOR THE MOST CURRENT REVISION OF THE PACK- AGE, VISIT WWW.FREESCALE.COM AND SELECT DOCUMENTA- www.DataSheet4U.com 33910 42 PACKAGE DIMENSIONS (Continued) AC SUFFIX (PB-FREE) 32-PIN LQFP 98ASH70029A REVISION D Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 43

... Revision Date 9/2007 3.0 2/2008 4.0 www.DataSheet4U.com Analog Integrated Circuit Device Data Freescale Semiconductor REVISION HISTORY Description of Changes • Initial Release • Changed Functional Block Diagram on page 22. REVISION HISTORY 33910 43 ...

Page 44

... Freescale Semiconductor Literature Distribution Center P.O. Box 5405 Denver, Colorado 80217 1-800-441-2447 or 303-675-2140 Fax: 303-675-2150 LDCForFreescaleSemiconductor@hibbertgroup.com MC33910 Rev. 4.0 2/2008 Information in this document is provided solely to enable system and software implementers to use Freescale Semiconductor products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document ...

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