MC74HC08AD ON Semiconductor, MC74HC08AD Datasheet
MC74HC08AD
Specifications of MC74HC08AD
Available stocks
Related parts for MC74HC08AD
MC74HC08AD Summary of contents
Page 1
MC74HC08A Quad 2−Input AND Gate High−Performance Silicon−Gate CMOS The MC74HC08A is identical in pinout to the LS08. The device inputs are compatible with Standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. Features • Output Drive Capability: ...
Page 2
... Plastic DIP: – 10 mW/_C from 65_ to 125_C SOIC Package: – 7 mW/_C from 65_ to 125_C TSSOP Package: − 6.1 mW/_C from 65_ to 125_C For high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D). RECOMMENDED OPERATING CONDITIONS Î Î Î Î ...
Page 3
... ORDERING INFORMATION Device MC74HC08AN MC74HC08ANG MC74HC08AD MC74HC08ADG MC74HC08ADR2 MC74HC08ADR2G MC74HC08ADTR2 MC74HC08ADTR2G MC74HC08AFEL MC74HC08AFELG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb−Free. Package PDIP−14 PDIP− ...
Page 4
... Maximum Low−Level Output Voltage OL I Maximum Input Leakage Current in I Maximum Quiescent Supply CC Current (per Package) NOTE: Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D). AC CHARACTERISTICS (C = 50pF, Input t L Symbol t , Maximum Propagation Delay, Input Output Y ...
Page 5
INPUT 50 10% t PLH 90% OUTPUT Y 50% 10% t TLH Figure 1. Switching Waveforms OUTPUT DEVICE UNDER TEST *Includes all probe and jig capacitance Figure 2. Test Circuit A B ...
Page 6
−T− SEATING PLANE 0.13 (0.005) PACKAGE DIMENSIONS PDIP−14 CASE 646−06 ISSUE http://onsemi.com 6 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI ...
Page 7
... G −T− SEATING 14 PL PLANE 0.25 (0.010 14X 0.58 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS SOIC−14 CASE 751A−03 ISSUE 0.25 (0.010 ...
Page 8
... S A −V− C 0.10 (0.004) −T− SEATING G D PLANE 14X 0.36 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS TSSOP−14 CASE 948G−01 ISSUE 0.25 (0.010) ...
Page 9
... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...