MC74HC573ADW ONSEMI [ON Semiconductor], MC74HC573ADW Datasheet
MC74HC573ADW
Manufacturer Part Number
MC74HC573ADW
Description
Octal 3-State Noninverting Transparent Latch
Manufacturer
ONSEMI [ON Semiconductor]
Datasheet
1.MC74HC573ADW.pdf
(8 pages)
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Part Number:
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Manufacturer:
MOT/ON
Quantity:
20 000
Part Number:
MC74HC573ADWR2
Manufacturer:
ON/安森美
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MC74HC573A
Octal 3-State Noninverting
Transparent Latch
High–Performance Silicon–Gate CMOS
are compatible with standard CMOS outputs; with pullup resistors,
they are compatible with LSTTL outputs.
asynchronously) when Latch Enable is high. When Latch Enable goes
low, data meeting the setup and hold time becomes latched.
inputs on the opposite side of the package from the outputs to facilitate
PC board layout.
May, 2000 – Rev. 9
The MC74HC573A is identical in pinout to the LS573. The devices
These latches appear transparent to data (i.e., the outputs change
The HC573A is identical in function to the HC373A but has the data
No. 7A
Output Drive Capability: 15 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0 A
In Compliance with the Requirements Defined by JEDEC Standard
Chip Complexity: 218 FETs or 54.5 Equivalent Gates
Semiconductor Components Industries, LLC, 2000
1
20
MC74HC573AN
MC74HC573ADW
MC74HC573ADWR2
MC74HC573ADT
MC74HC573ADTR2
20
20
1
1
Device
1
ORDERING INFORMATION
A
WL = Wafer Lot
YY = Year
WW = Work Week
SOIC WIDE–20
http://onsemi.com
DW SUFFIX
CASE 751D
= Assembly Location
CASE 948E
DT SUFFIX
TSSOP–20
CASE 738
N SUFFIX
PDIP–20
SOIC–WIDE
SOIC–WIDE
TSSOP–20
TSSOP–20
Publication Order Number:
Package
PDIP–20
20
20
1
1
MC74HC573A/D
MC74HC573AN
DIAGRAMS
MARKING
AWLYYWW
AWLYYWW
20
1
HC573A
1000 / Reel
2500 / Reel
1440 / Box
Shipping
38 / Rail
75 / Rail
ALYW
573A
HC
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MC74HC573ADW Summary of contents
Page 1
... TSSOP– SUFFIX 1 CASE 948E A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week ORDERING INFORMATION Device Package MC74HC573AN PDIP–20 MC74HC573ADW SOIC–WIDE MC74HC573ADWR2 SOIC–WIDE MC74HC573ADT TSSOP–20 MC74HC573ADTR2 TSSOP–20 1 Publication Order Number: MARKING DIAGRAMS 20 MC74HC573AN AWLYYWW 1 20 HC573A AWLYYWW ...
Page 2
LOGIC DIAGRAM DATA INPUTS LATCH ENABLE PIN ...
Page 3
MAXIMUM RATINGS* Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î ...
Page 4
DC ELECTRICAL CHARACTERISTICS Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î ...
Page 5
TIMING REQUIREMENTS ( pF, ...
Page 6
INPUT D 50% 10% t PLH 90% 50% Q 10% t TLH Figure 1. OUTPUT ENABLE 50% t PZL t PLZ Q 50% t PZH t PHZ Q 1.3 V Figure 3. TEST POINT OUTPUT ...
Page 7
SEATING PLANE 0.25 (0.010 20X T 0. 18X MC74HC573A PACKAGE DIMENSIONS PDIP–20 N SUFFIX PLASTIC DIP PACKAGE CASE 738–03 ...
Page 8
K 20X REF 0.10 (0.004) 0.15 (0.006 L PIN 1 IDENT 1 0.15 (0.006 –V– 0.100 (0.004) –T– SEATING PLANE ON Semiconductor and are trademarks of Semiconductor Components ...