MM74HC04M Fairchild Semiconductor, MM74HC04M Datasheet

IC INVERTER HEX 14-SOIC

MM74HC04M

Manufacturer Part Number
MM74HC04M
Description
IC INVERTER HEX 14-SOIC
Manufacturer
Fairchild Semiconductor
Series
74HCr
Datasheet

Specifications of MM74HC04M

Logic Type
Inverter
Number Of Inputs
1
Number Of Circuits
6
Current - Output High, Low
5.2mA, 5.2mA
Voltage - Supply
2 V ~ 6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Logic Family
74HC
High Level Output Current
- 5.2 mA
Low Level Output Current
5.2 mA
Propagation Delay Time
95 ns, 19 ns, 16 ns
Supply Voltage (max)
6 V
Supply Voltage (min)
2 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
2 V to 6 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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©1983 Fairchild Semiconductor Corporation
MM74HC04 Rev. 1.3.0
MM74HC04
Hex Inverter
Features
Ordering Information
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
Connection Diagram
Order Number
MM74HC04M
MM74HC04SJ
MM74HC04MTC
MM74HC04N
Pin Assignments for DIP, SOIC, SOP and TSSOP
Typical propagation delay: 8ns
Fan out of 10 LS-TTL loads
Quiescent power consumption: 10µW maximum at
room temperature
Low input current: 1µA maximum
All packages are lead free per JEDEC: J-STD-020B standard.
Package
Number
MTC14
M14A
M14D
N14A
Top View
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
General Description
The MM74HC04 inverters utilize advanced silicon-gate
CMOS technology to achieve operating speeds similar to
LS-TTL gates with the low power consumption of stan-
dard CMOS integrated circuits.
The MM74HC04 is a triple buffered inverter. It has high
noise immunity and the ability to drive 10 LS-TTL loads.
The 74HC logic family is functionally as well as pin-out
compatible with the standard 74LS logic family. All inputs
are protected from damage due to static discharge by
internal diode clamps to V
Logic Diagram
Package Description
1 of 6 Inverters
CC
and ground.
February 2008
www.fairchildsemi.com

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MM74HC04M Summary of contents

Page 1

... Package Order Number Number MM74HC04M M14A MM74HC04SJ M14D MM74HC04MTC MTC14 MM74HC04N N14A Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. Connection Diagram Pin Assignments for DIP, SOIC, SOP and TSSOP Top View © ...

Page 2

... V DC Input or Output Voltage IN OUT T Operating Temperature Range Input Rise or Fall Times 2. 4. 6.0V CC ©1983 Fairchild Semiconductor Corporation MM74HC04 Rev. 1.3.0 (1) Parameter Parameter 2 Rating –0.5 to +7.0V –1 +1.5V CC –0 +0.5V CC ±20mA ±25mA ±50mA –65°C to +150°C 600mW 500mW 260°C Min ...

Page 3

... For a power supply of 5V ±10% the worst case output voltages (V values should be used when designing with this supply. Worst case V respectively. (The V value at 5.5V is 3.85V.) The worst case leakage current (I IH the higher voltage and so the 6.0V values should be used. ©1983 Fairchild Semiconductor Corporation MM74HC04 Rev. 1.3.0 ( ...

Page 4

... Maximum Output TLH THL Rise and Fall Time C Power Dissipation PD (4) Capacitance C Maximum Input IN Capacitance Note determines the no load dynamic power consumption current consumption ©1983 Fairchild Semiconductor Corporation MM74HC04 Rev. 1.3.0 t 6ns r f Conditions t 6ns (unless otherwise specified (V) Conditions Typ. CC 2 ...

Page 5

... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...

Page 6

... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...

Page 7

... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...

Page 8

... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...

Page 9

... TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended exhaustive list of all such trademarks. ® ACEx Build it Now™ CorePLUS™ CROSSVOLT™ CTL™ Current Transfer Logic™ ...

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