mr2a16a ETC-unknow, mr2a16a Datasheet

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mr2a16a

Manufacturer Part Number
mr2a16a
Description
256k X 16-bit 3.3-v Asynchronous Magnetoresistive Ram
Manufacturer
ETC-unknow
Datasheet

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Freescale Semiconductor
Advance Information
256K x 16-Bit 3.3-V Asynchronous
Magnetoresistive RAM
Introduction
The MR2A16A is a 4,194,304-bit magnetoresistive random access memory (MRAM) device organized as
262,144 words of 16 bits. The MR2A16A is equipped with chip enable (E), write enable (W), and output
enable (G) pins, allowing for significant system design flexibility without bus contention. Because the
MR2A16A has separate byte-enable controls (LB and UB), individual bytes can be written and read.
MRAM is a nonvolatile memory technology that protects data in the event of power loss and does not
require periodic refreshing. The MR2A16A is the ideal memory solution for applications that must
permanently store and retrieve critical data quickly.
The MR2A16A is available in a 400-mil, 44-lead plastic small-outline TSOP type-II package with an
industry-standard center power and ground SRAM pinout.
Features
© Freescale Semiconductor, Inc., 2004. All rights reserved.
This document contains information on a new product. Specifications and information
herein are subject to change without notice.
Single 3.3-V power supply
Commercial temperature range (0°C to 70°C)
Symmetrical high-speed read and write with fast access time (25 ns)
Flexible data bus control — 8 bit or 16 bit access
Equal address and chip-enable access times
Automatic data protection with low-voltage inhibit circuitry to prevent writes on power loss
All inputs and outputs are transistor-transistor logic (TTL) compatible
Fully static operation
Full nonvolatile operation with 10 years minimum data retention
Rev. 0.1, 7/2004
MR2A16A/D

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mr2a16a Summary of contents

Page 1

... Introduction The MR2A16A is a 4,194,304-bit magnetoresistive random access memory (MRAM) device organized as 262,144 words of 16 bits. The MR2A16A is equipped with chip enable (E), write enable (W), and output enable (G) pins, allowing for significant system design flexibility without bus contention. Because the MR2A16A has separate byte-enable controls (LB and UB), individual bytes can be written and read. ...

Page 2

... Figure 2. MR2A16A in 44-Pin TSOP Type II Package 2 UPPER BYTE OUTPUT ENABLE LOWER BYTE OUTPUT ENABLE 8 10 ROW COLUMN DECODER DECODER SENSE AMPS 16 256K x 16 BIT MEMORY ARRAY 16 FINAL WRITE DRIVERS UPPER BYTE WRITE ENABLE LOWER BYTE WRITE ENABLE Figure 1 ...

Page 3

... Output disabled L H Lower byte read H L Upper byte read L L Word read L H Lower byte write H L Upper byte write L L Word write Table 3. Absolute Maximum Ratings . SS MR2A16A/D, Rev. 0.1 Electrical Specifications V DD DQL[7:0] DQU[15:8] Current Hi-Z Hi-Z SB1 SB2 I Hi-Z Hi-Z DDA I Hi-Z Hi-Z DDA I ...

Page 4

... Table 6. Power Supply Characteristics Timing Set Symbol 20 I DDR 25 I DDR 35 I DDR 20 I DDW 25 I DDW 35 I DDW 20 I SB1 25 I SB1 35 I SB1 I SB2 MR2A16A/D, Rev. 0.1 Typ Max (1) 3.3 3.6 (1) 2.7 3.0 — 0.3 DD (3) — 0.8 70 falls below minimum Typ Max — r1 — r1 — 0 0.2 SS — ...

Page 5

... A Table 8. ac Measurement Conditions Parameter OUTPUT 600 : 1 Figure 3. Output Load for ac Test MR2A16A/D, Rev. 0.1 Electrical Specifications Max Unit Value 1 See Figure 3A See Figure 3B +3 ...

Page 6

... AXQX t 3 — 3 ELQX t 0 — 0 GLQX t 0 — 0 BLQX EHQZ GHQZ BHQZ MR2A16A/D, Rev. 0 Unit Max Min Max — 35 — — — — — — 3 — ns — 3 — ...

Page 7

... E (CHIP ENABLE) G (OUTPUT ENABLE) LB, UB (BYTE ENABLE) Q (DATA OUT) Freescale Semiconductor t AVAV t AXQX t AVQV , Figure 4. Read Cycle 1 t AVAV t AVQV t ELQV t ELQX t GLQV t GLQX t BLQV t BLQX Figure 5. Read Cycle 2 MR2A16A/D, Rev. 0.1 Timing Specifications DATA VALID t EHQZ t GHQZ t BHQZ DATA VALID 7 ...

Page 8

... WLEH t 5 — 6 DVWH t 0 — 0 WHDX WLQZ t 3 — 3 WHQX t 8 — 10 WHAX max < t min. WLQZ WHQX MR2A16A/D, Rev. 0 Unit Max Min Max — 35 — ns — 0 — ns — 18 — ns — 20 — ns — 15 — ns — 15 — ns — ...

Page 9

... A (ADDRESS) E (CHIP ENABLE) W (WRITE ENABLE) LB, UB (BYTE ENABLE) D (DATA IN) Hi-Z Q (DATA OUT) Freescale Semiconductor t AVAV t AVWH t WLEH t WLWH t AVWL t DATA VALID t WLQZ Hi-Z Figure 6. Write Cycle 1 (W Controlled) MR2A16A/D, Rev. 0.1 Timing Specifications t WHAX t DVWH WHDX t WHQX 9 ...

Page 10

... AVEH t ELEH 8 — ELWH t ELEH 8 — ELWH t 5 — 6 DVEH t 0 — 0 EHDX t 8 — 10 EHAX MR2A16A/D, Rev. 0.1 35 Unit Max Min Max — 35 — ns — 0 — ns — 18 — ns — 20 — ns — 15 — ns — 15 — ns — 10 — ns — ...

Page 11

... A (ADDRESS) E (CHIP ENABLE) W (WRITE ENABLE) LB, UB (BYTE ENABLE) D (DATA IN) Q (DATA OUT) Freescale Semiconductor t AVAV t AVEH t AVEL Hi-Z Figure 7. Write Cycle 2 (E Controlled) MR2A16A/D, Rev. 0.1 Timing Specifications t EHAX t ELEH t ELWH t t DVEH EHDX DATA VALID 11 ...

Page 12

... AVBL t 12 — 15 AVBH t 15 — 17 AVBH t BLEH 8 — 10 BLWH t BLEH 8 — 10 BLWH 5 — 6 DVBH 0 — 0 BHDX 8 — 10 BHAX MR2A16A/D, Rev. 0 Unit Max Min Max — 35 — ns — 0 — ns — 18 — ns — 20 — ns — 15 — ns — 15 — ns — 10 — ns — ...

Page 13

... A (ADDRESS) E (CHIP ENABLE) LB, UB (BYTE ENABLE) W (WRITE ENABLE) D (DATA IN) Hi-Z Q (DATA OUT) Figure 8. Write Cycle 3 (LB/UB Controlled) Freescale Semiconductor t AVAV t AVBH t t AVBL BLEH t BLWH t DVBH DATA VALID Hi-Z MR2A16A/D, Rev. 0.1 Timing Specifications t BHAX t BHDX 13 ...

Page 14

... Ordering Information Ordering Information MR Freescale MRAM Memory Prefix Density Code ( Mb Mb) Memory Type (A = Asynch Sync) Commercial Device Numbers — MR2A16ATS25C MR2A16ATS35C TS Package (44-Lead, TSOP Type II, Case 924A-02 18.54 18. 0.8 42X Notes 14 (Order by Full Part Number ...

Page 15

... Freescale Semiconductor This page is intentionally blank MR2A16A/D, Rev. 0.1 Notes 15 ...

Page 16

... Learn More: For more information about Freescale Semiconductor products, please visit http://www.freescale.com MR2A16A/D Rev. 0.1, 7/2004 Information in this document is provided solely to enable system and software implementers to use Freescale Semiconductor products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document ...

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