MT16LSDT3264 Micron, MT16LSDT3264 Datasheet
MT16LSDT3264
Related parts for MT16LSDT3264
MT16LSDT3264 Summary of contents
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... Meg x 8 Row Addressing 4K (A0–A11) Column Addressing 1K (A0–A9) Module Banks 1 (S0,S2) 16, 32 Meg x 64 SDRAM DIMMs SD8_16C16_32X64AG_C.p65 – Rev. C, Pub. 9/01 MT8LSDT1664A - 128MB MT16LSDT3264A - 256MB For the latest data sheet, please refer to the Micron Web site: www.micron.com/datasheets MARKING G -13E -133 -10E PC133 ...
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... GENERAL DESCRIPTION The MT8LSDT1664A and MT16LSDT3264A are high-speed CMOS, dynamic random-access, 128MB and 256MB memory modules organized in a x64 con- figuration. These modules use internally configured quad-bank SDRAMs with a synchronous interface (all signals are registered on the positive edge of the clock signals CK0-CK3). ...
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... BA0: SDRAMs U1-U4/U6-U9 BA1: SDRAMs U1-U4/U6-U9 SDRAMs U1-U4/U6-U9 2.2 F CK1, CK3 SDRAMs U1-U4/U6-U9 SPD U10 SDA U1-U4/U6-U9 = MT48LC16M8A2TG SDRAMs SA0 SA1 SA2 3 128MB / 256MB (x64) 168-PIN SDRAM DIMMs DQM CS# U2 DQM CS# U4 DQM CS# U6 DQM CS 3.3pF 3.3pF 10pF ©2001, Micron Technology, Inc. ...
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... A1 SA0 SA1 NOTE: 1. All resistor values are 10 ohms unless otherwise specified. 2. Reference designators in this diagram do not necessarily match the actual module. 16, 32 Meg x 64 SDRAM DIMMs SD8_16C16_32X64AG_C.p65 – Rev. C, Pub. 9/01 FUNCTIONAL BLOCK DIAGRAM MT16LSDT3264A (256MB) S1# DQM CS# DQ0 U1 DQ1 U19 DQ2 DQ3 ...
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... LOAD MODE REGISTER command. WP Input Write Protect: Serial presence-detect hardware write protect. SCL Input Serial Clock for Presence-Detect: SCL is used to synchronize the presence-detect data transfer to and from the module. 5 128MB / 256MB (x64) 168-PIN SDRAM DIMMs DESCRIPTION ©2001, Micron Technology, Inc. ...
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... V Supply Power Supply: +3.3V ±0.3V.** DD V Supply Ground.** SS NC – Not Connected: These pins are not connected on this module. 6 128MB / 256MB (x64) 168-PIN SDRAM DIMMs DESCRIPTION ©2001, Micron Technology, Inc. ...
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... The remaining (least significant) address bit(s) is (are) used to select the starting loca- tion within the block. Full-page bursts wrap within the page if the boundary is reached, as shown in the Burst Definition Table. 7 128MB / 256MB (x64) 168-PIN SDRAM DIMMs ©2001, Micron Technology, Inc. ...
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... For a full-page burst, the full row is selected and A0-A9 select the starting column. 6. Whenever a boundary of the block is reached within a given sequence above, the following access wraps within the block. 7. For a burst length of one, A0-A9 select the unique column to be accessed, and mode register bit M3 is ignored. ©2001, Micron Technology, Inc. 0-1 1-0 0-1-2-3 1-0-3-2 2-3-0-1 3-2-1-0 0-1-2-3-4-5-6-7 ...
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... D OUT -10E NOP NOP OUT t AC DON’T CARE UNDEFINED 9 128MB / 256MB (x64) 168-PIN SDRAM DIMMs CAS Latency Table ALLOWABLE OPERATING FREQUENCY (MHz) CAS CAS LATENCY = 2 LATENCY = 3 133 143 100 133 100 125 ©2001, Micron Technology, Inc. ...
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... – – – – L – – – – ADDR DQs NOTES Bank/Row X 3 Bank/Col X 4 Bank/Col Valid 4 X Active Code Op-code X 2 – Active 8 – High-Z 8 ©2001, Micron Technology, Inc. ...
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... UNITS NOTES -0.3 0 -40 40 µA I -40 40 µA 2.4 – – 0 UNITS NOTES -0.3 0 -80 80 µA I -80 80 µA 2.4 – – 0 ©2001, Micron Technology, Inc ...
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... 1,336 1,216 1,136 5,280 4,960 4,320 ©2001, Micron Technology, Inc 18, 19 12, 19 18, 19 12, 18, 19 18, 19 12, 19, 30 ...
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... C – 256MB SYMBOL MIN MAX UNITS 13 – ©2001, Micron Technology, Inc ...
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... CLK + 7.5ns 7ns ©2001, Micron Technology, Inc. NOTES ...
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... ©2001, Micron Technology, Inc. ...
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... IL 3ns. t RP) begins 7ns for -13E; 7.5ns for -133 and t RAS used in -13E speed grade module 45ns 10ns; for -133 and 7.5ns. ©2001, Micron Technology, Inc. t RP; clock( 7.5ns for - undershoot limit is actu- DD ...
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... SCL SDA DATA STABLE Figure 3 17 128MB / 256MB (x64) 168-PIN SDRAM DIMMs START BIT Figure 2 Definition of Start and Stop 8 9 Acknowledge ©2001, Micron Technology, Inc. STOP BIT ...
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... Start, Device Select Address reSTART, Device Select Similar to Current or Random Address Read START, Device Select START, Device Select SU:DAT t SU:STO MIN 4 4.7 250 4.7 4 BUF UNDEFINED MAX UNITS µs µs 1 µs ns µs µs ©2001, Micron Technology, Inc. ...
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... DH 300 300 ns t HD:DAT 0 µs t HD:STA 4 µs t HIGH 4 µ 100 ns t LOW 4.7 µ µs t SCL 100 KHz t SU:DAT 250 ns t SU:STA 4.7 µs t SU:STO 4.7 µs t WRC 10 ms ©2001, Micron Technology, Inc. UNITS µA µA µA mA NOTES 2 ...
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... UNBUFFERED 0E 7.5 (13E) 10 (-133/-10E) 54 (-13E) 6 (-133/-10E (-13E) 20 (-133/-10E) t RRD 14 (-13E) 15 (-133) 20 (-10E) t RCD 15 (-13E) 20 (-133/-10E) 20 128MB / 256MB (x64) 168-PIN SDRAM DIMMs MT8LSDT1664AG MT16LSDT3264AG ...
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... DS 1.5 (-13E/-133) 2 (-10E 0.8 (-13E/-133) 1 (-10E) REV. 1.2 (-13E) (-133) (-10E) MICRON 0 100 MHz (-13E/-133/-10E 128MB / 256MB (x64) 168-PIN SDRAM DIMMs MT8LSDT1664AG MT16LSDT3264AG ...
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... SDRAM DIMMs 1.131 (28.73) 1.119 (28.42) .700 (17.78) TYP .128 (3.25) (2X) .118 (3.00) .050 (1.27) TYP PIN 84 (PIN 168 ON BACKSIDE) 1.380 (35.05) 1.370 (34.80) .700 (17.78) TYP .128 (3.25) (2X) .118 (3.00) .050 (1.27) TYP TYP PIN 84 (PIN 168 ON BACKSIDE) ©2001, Micron Technology, Inc. .125 (3.18) MAX .054 (1.37) .046 (1.17) .125 (3.18) MAX .054 (1.37) .046 (1.17) ...
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... TYP 4.550 (115.57) BACK VIEW MIN 23 128MB / 256MB (x64) 168-PIN SDRAM DIMMs 1.131 (28.73) 1.119 (28.42) .700 (17.78) TYP .128 (3.25) (2X) .118 (3.00) .050 (1.27) TYP PIN 84 (PIN 168 ON BACK SIDE) PIN 85 (PIN 1 ON FRONT SIDE) ©2001, Micron Technology, Inc. .157 (4.00) MAX .054 (1.37) .046 (1.17) ...
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... S. Federal Way, P.O. Box 6, Boise, ID 83707-0006, Tel: 208-368-3900 E-mail: prodmktg@micron.com, Internet: http://www.micron.com, Customer Comment Line: 800-932-4992 Micron is a registered trademark and the Micron logo and M logo are trademarks of Micron Technology, Inc. 16, 32 Meg x 64 SDRAM DIMMs SD8_16C16_32X64AG_C.p65 – Rev. C, Pub. 9/01 ...