MX29L3211 Macronix International, MX29L3211 Datasheet
MX29L3211
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MX29L3211 Summary of contents
Page 1
... The MX29L3211 uses a 3.3V ± 10% VCC supply to perform the Auto Erase and Auto Program algorithms. The highest degree of latch-up protection is achieved with MXIC's proprietary non-epi process. Latch-up protection is proved for stresses up to 100 milliamps on address and data pin from -1V to VCC +1V ...
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... Q10 GND 25 GND 2 MX29L3211 PIN NAME Address Inputs Data Input/Output Q15(Word mode)/LSB Address (Byte mode) Chip Enable Input Output Enable Input Write Enable Input BYTE/Word Mode Selection Power Supply Ground Pin REV. 0.3, NOV. 06, 2001 ...
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... P/N:PM0641 CONTROL PROGRAM/ERASE INPUT HIGH VOLTAGE LOGIC MX29L3211 ADDRESS FLASH ARRAY LATCH AND BUFFER Y-PASS GATE SENSE AMPLIFIER Y-select Q0-Q15/A-1 I/O BUFFER 3 MX29L3211 WRITE STATE MACHINE (WSM) COMMAND INTERFACE REGISTER (CIR) ARRAY SOURCE HV COMMAND DATA DECODER PGM DATA HV COMMAND DATA LATCH PROGRAM DATA LATCH REV ...
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... Q0-7 and Q8-14 float. AddressQ15/A-1 selects between the high and low byte. BYTE high places the device in x16 mode, and turns off the Q15/ A-1 input buffer. Address A0, then becomes the lowest order address. DEVICE POWER SUPPLY(3.3V ± 10%) GROUND 4 MX29L3211 REV. 0.3, NOV. 06, 2001 ...
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... VIH VIH X X VIH VIL VIL VIH VIL VIL VIL VIL VIH VIH VIL VIL VIH VIL MX29L3211 Q0-Q7 Q8-Q14 Q15/A-1 DOUT DOUT DOUT High Z High Z HighZ High Z HIgh Z HighZ C2H 00H 0B F9H 00H 0B DIN DIN DIN A9 Q0-Q7 Q8-Q14 Q15/A-1 ...
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... F0H 90H A0H 80H RA 00H/01H PA 5555H RD C2H/F9H PD AAH 2AAAH 55H 5555H 10H 6 MX29L3211 Sector Erase Erase Read Erase Suspend Resume Status Reg 5555H 5555H 5555H 5555H AAH AAH AAH AAH 2AAAH 2AAAH 2AAAH ...
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... AAH AAH AAH 2AAAH 2AAAH 2AAAH 55H 55H 55H 5555H 5555H 5555H 60H 60H 90H 5555H 5555H * AAH AAH C2H* 2AAAH 2AAAH 55H 55H SA** SA** 20H 40H 7 MX29L3211 Abort 3 5555H AAH 2AAAH 55H 5555H E0H REV. 0.3, NOV. 06, 2001 ...
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... MX29L3211 Device Code X Verify Sector Protect * MX29L3211 Manufacturer Code = C2H, Device Code = F9H when BYTE = VIL MX29L3211 Manufacturer Code = 00C2H, Device Code = 00F9H when BYTE = VIH ** Outputs C2H at protected sector address, 00H at unprotected scetor address. ***Only the top and the bottom sectors have protect-bit feature. Sector address = (A20, A19, A18,A17,A16) = 00000B or 11111B ...
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... Refer to the AC Read Characteristics and Waveforms for the specific timing parameters. The MX29L3211 is accessed like an EPROM. When CE and OE are low and WE is high the data stored at the memory location determined by the address pins is asserted on the outputs. The outputs are put in the high impedance state whenever high ...
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... Q7 is "1" at which time the device stays at read status register mode. The device remains enabled for read status register mode until the CIR contents are altered by a valid command sequence.(Refer to table 3,6 and Figure 2,7,9) Table 5. MX29L3211 Sector Address Table (Word-Wide Mode) A20 A19 A18 ...
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... CIR to return to the Read Array mode. The status register bits are output Q7(table 6) whether the device is in the byte-wide (x8) or word-wide (x16) mode for the MX29L3211. In the word-wide mode the upper byte, Q(8:15) is set to 00H during a Read Status command. In the byte-wide mode, Q(8:14) are tri-stated and Q15/A-1 retains the low order address function ...
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... TABLE 6. MX29L3211 STATUS REGISTER STATUS IN PROGRESS PROGRAM ERASE SUSPEND (NOT COMPLETE) COMPLETE PROGRAM www.DataSheet4U.com ERASE FAIL PROGRAM ERASE AFTER CLEARING STATUS REGISTER NOTES WRITE STATE MACHINE STATUS 1 = READY BUSY Q6 : ERASE SUSPEND STATUS 1 = SUSPEND SUSPEND Q5 : ERASE FAIL STATUS 1 = FAIL IN ERASE SUCCESSFUL ERASE ...
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... Note that once device is brought out, Clear status register mode is required before a program or erase operation can be executed. DATA PROTECTION The MX29L3211 is designed to offer protection against accidental erasure or programming caused by spurious system level signals that may exist during power transitions. During power up the device automatically resets the internal state machine in the Read Array mode ...
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... Noise pulses of less than 10ns (typical will not initiate a write cycle. LOGICAL INHIBIT Writing is inhibited by holding any one VIL,CE = VIH VIH. To initiate a write cycle CE and WE must be a logical zero while logical one. P/N:PM0641 MX29L3211 14 REV. 0.3, NOV. 06, 2001 ...
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... Loading End? YES Wait 100us Read Status Register NO SR7 = 1 ? YES NO SR4 = 0 ? YES Page Program Completed To Continue Other Operations, YES Program another page? NO Operation Done, Device Stays At Read S.R. Mode Note : S.R. Stands for Status Register 15 MX29L3211 Program Error Do Clear S.R. Mode First REV. 0.3, NOV. 06, 2001 ...
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... Write Data 10H Address 5555H Read Status Register SR7 = 1 SR5 = 0 Chip Erase Completed Operation Done, Device Stays at Read S.R. Mode P/N:PM0641 Execute Suspend Mode ? ? YES NO ? YES Erase Error To Continue Other Operations, Do Clear S.R. Mode First 16 MX29L3211 YES Erase Suspend Flow (Figure 4.) REV. 0.3, NOV. 06, 2001 ...
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... Write Data 30H Sector Address Sector Erase Completed P/N:PM0641 START Read Status Register NO To Execute SR7 = 1 Suspend Erase ? ? YES NO SR5 = 0 ? YES To Continue Other Operation Done, Operations, Do Clear Device Stays at Read S.R. Mode 17 MX29L3211 NO YES Erase Suspend Flow (Figure 4.) Erase Error S.R. Mode First REV. 0.3, NOV. 06, 2001 ...
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... Write Data AAH Address 5555H Write Data 55H Address 2AAAH Write Data D0H Address 5555H Continue Erase P/N:PM0641 NO ? YES NO SR5 = YES Erase has completed Operation Done, Device Stays at Read S,R, Mode NO YES 18 MX29L3211 NO YES Erase Error To Continue Other Operations, Do Clear S.R. Mode First REV. 0.3, NOV. 06, 2001 ...
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... CL 6.2K ohm CL = 100 pF Including jig capacitance 2.4V 2.0V TEST POINTS 0.8V 0.45V INPUT AC TESTING: Inputs are driven at 2.4V for a logic "1" and 0.45V for a logic "0". Input pulse rise and fall times are < 5ns. 19 MX29L3211 MAX. UNIT CONDITIONS 14 pF VIN = VOUT = 0V 2.7K ohm 3.3V DIODES = IN3064 OR EQUIVALENT 1 ...
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... VCC+0.3 0.45 2.4 20 MX29L3211 UNITS TEST CONDITIONS uA VCC = VCC Max VIN = VCC or GND uA VCC = VCC Max VIN = VCC or GND uA VCC = VCC Max CE = VCC± 0.2V mA VCC = VCC Max CE = VIH mA VCC = VCC Max f = 10MHz, IOUT = VIH ...
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... Input rise and fall times: 5ns • Output load: Page Speed Output load(Including scope and jig) tPA=50ns 1 TTL gate + 100pF tPA=40ns 1 TTL gate + 30pF • Reference levels for measuring timing: 1.5V P/N:PM0641 MX29L3211 29L3211-10 29L3211-12 MIN. MAX. MIN. MAX. UNIT 100 120 ns 50 ...
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... For real world application, BYTE pin should be either static high(word mode) or static low(byte mode); dynamic switching of BYTE pin is not recommended. P/N:PM0641 Device and Outputs Enabled Standby address selection ADDRESSES STABLE tCE HIGH Z tACC 22 MX29L3211 Standby Power-down Data valid Vcc tDF tOE tOH Data out valid REV. 0.3, NOV. 06, 2001 HIGH Z ...
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... VOH DATA(Q0-Q7) VOL VOH DATA(Q8-Q15) VOL P/N:PM0641 VALID ADDRESS tACC tPA tOE ADDRESSES STABLE tCE HIGH Z tACC HIGH Z 23 MX29L3211 tPA tPA tOH tDF tDF tBACC tOE tOH Data Output Data Output tBHZ HIGH Z Data Output REV. 0.3, NOV. 06, 2001 HIGH Z ...
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... Write Pulse Width tWPH Write Pulse Width High tBALC Byte(Word) Address Load Cycle tBAL Byte(Word) Address Load Time tSRA Status Register Access Time tCESR CE Setup before S.R. Read tVCS VCC Setup Time P/N:PM0641 MX29L3211 29L3211-10 29L3211-12 MIN. MAX. MIN. 120 120 ...
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... during the 3rd command write bus cycle; for real world application, BYTE pin should be either static high(word mode) or static low(byte mode). P/N:PM0641 tCH tCS tGHWL tWP tAS tAH VALID tDH tDS HIGH Z DIN 25 MX29L3211 tWC tWPH REV. 0.3, NOV. 06, 2001 ...
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... Page Address tWC tBALC tWPH tWP tDS tDH Write AAH 55H A0H Data NOTE: 1.Please refer to page 9 for detail page program operation. 26 MX29L3211 Last Word offset Address Last Low/High Byte Select tBAL tCES tSRA Last Write SRD Data REV. 0.3, NOV. 06, 2001 ...
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... WE OE DATA NOTES: 1."*" means "don't care" in this diagram. 2."SA" means "Sector Adddress". P/N:PM0641 5555H 2AAAH 5555H tAH tWPH tWP tWC tDS tDH AAH 55H 80H AAH 27 MX29L3211 2AAAH */5555H SA/* tCESR tCES tSRA 55H 30H SRD REV. 0.3, NOV. 06, 2001 ...
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... Device Stays at Read S.R. Mode NOTE : *Only the Top or the Bottom Sector Address is vaild in this feature. i.e. Sector Address = (A20,A19,A18,A17,A16) = 00000B or 11111B P/N:PM0641 NO Verify Protect Status Flow YES (Figure 12) 28 MX29L3211 Increment PLSCNT, To Protect Sector Again NO YES PLSCNT = 25 ? Device Failed NO Data = C2H ? YES ...
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... Device Stays at Read S.R. Mode NOTE : *Only the Top or the Bottom Sector Address is vaild in this feature. i.e. Sector Address = (A20,A19,A18,A17,A16) = 00000B or 11111B P/N:PM0641 NO Verify Protect Status Flow YES (Figure 12) 29 MX29L3211 Increment PLSCNT, To Unprotect Sector Again NO YES PLSCNT = 25 ? Device Failed NO Data = 00H ? YES ...
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... Data Outputs C2H as Protected Sector Verified Code. Data Outputs 00H as Unprotected Sector Verified Code. 2. Sepecified address will be either (A20,A19,A18,A17,A16,A1,A0) = (0000010) or (1111110), the rest of the address pins are don't care. 3. Silicon ID can be read via this Flow Chart. Refer to Table 4. 30 MX29L3211 REV. 0.3, NOV. 06, 2001 ...
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... BYTE pin is sampled on the falling edge during the 3rd command write bus cycle; for real world applicaton, BYTE pin should be either static high(word mode) or static low(byte mode). P/N:PM0641 tWH tWS tGHWL tCP tAS tAH VALID tDH tDS HIGH Z DIN 31 MX29L3211 tWC tCPH REV. 0.3, NOV. 06, 2001 ...
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... Page Address tWC tCPH tCP tDS tDH Write AAH 55H A0H Data NOTE: 1.Please refer to page 9 for detail page program operation. 32 MX29L3211 Last Word Offset Address Last Low/High Byte Select tBALC tBAL tCES tSRA Last Write SRD Data REV. 0.3, NOV. 06, 2001 ...
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... Input Voltage with respect to GND on all I/O pins Current Includes all pins except Vcc. Test conditions: Vcc = 3.3V, one pin at a time. P/N:PM0641 LIMITS MIN. TYP. MAX. 200 2000 5 500 80 800 20 2000 10,000 33 MX29L3211 UNITS ms ms sec us Cycles MIN. MAX. -1.0V 6.6V -1.0V Vcc + 1.0V -100mA +100mA REV. 0.3, NOV. 06, 2001 ...
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... ORDERING INFORMATION PLASTIC PACKAGE PART NO. MX29L3211MC-10 MX29L3211TC-10 www.DataSheet4U.com P/N:PM0641 ACCESS TIME OPERATING CURRENT STANDBY CURRENT (ns) MAX.(mA) 100 50 100 50 34 MX29L3211 PACKAGE MAX.(uA Pin SOP 20 48 Pin TSOP REV. 0.3, NOV. 06, 2001 ...
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... PACKAGE INFORMATION 44-PIN PLASTIC SOP www.DataSheet4U.com P/N:PM0641 MX29L3211 35 REV. 0.3, NOV. 06, 2001 ...
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... PLASTIC TSOP(NORMAL TYPE) www.DataSheet4U.com P/N:PM0641 MX29L3211 36 REV. 0.3, NOV. 06, 2001 ...
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... Add 48TSOP Add order information Add package information 0.2 Del Fast pagemode access time:30ns Modify 29L3211-10 tPA:30-->50 ; 29L3211-12 tPA:40-->50 Add tPA=50ns 1 TTL gate + 100pF ; tPA=40ns 1 TTL gate + 30pF 0.3 To modify Package Information www.DataSheet4U.com P/N:PM0641 MX29L3211 Page P1,2 P34 P35 P1 P21 P21 P35~36 37 Date JAN/19/2000 ...
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... FAX:+65-348-8096 TAIPEI OFFICE: TEL:+886-2-2509-3300 FAX:+886-2-2509-2200 M A ACRONIX MERICA, TEL:+1-408-453-8088 FAX:+1-408-453-8488 CHICAGO OFFICE: TEL:+1-847-963-1900 FAX:+1-847-963-1909 http : //www.macronix.com C L O., TD. I NC. MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice. 38 MX29L3211 ...