nb2308a ON Semiconductor, nb2308a Datasheet

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nb2308a

Manufacturer Part Number
nb2308a
Description
3.3 V Zero Delay Clock Buffer
Manufacturer
ON Semiconductor
Datasheet

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NB2308A
3.3 V Zero Delay
Clock Buffer
distribute high-speed clocks. It is available in a 16 pin package. The
part has an on-chip PLL which locks to an input clock presented on
the REF pin. The PLL feedback is required to be driven to FBK pin,
and can be obtained from one of the outputs. The input-to-output
propagation delay is guaranteed to be less than 250 ps, and the
output-to-output skew is guaranteed to be less than 200 ps.
controlled by the select inputs as shown in the Select Input Decoding
Table. If all the output clocks are not required, Bank B can be
three-stated. The select input also allows the input clock to be directly
applied to the outputs for chip and system testing purposes.
distribute it. In this case the skew between the outputs of the two
devices is guaranteed to be less than 700 ps.
NB2308A Configurations Table). The NB2308Ax1* is the base part,
where the output frequencies equal the reference if there is no counter
in the feedback path. The NB2308Ax1H is the high-drive version of
the -1 and the rise and fall times on this device are much faster.
on each output bank. The exact configuration and output frequencies
depends on which output drives the feedback pin. The NB2308Ax3
allows the user to obtain 4X and 2X frequencies on the outputs.
Thus, the part is extremely versatile, and can be used in a variety of
applications.
banks.
Features
*x = I for Industrial.
© Semiconductor Components Industries, LLC, 2007
November, 2007 - Rev. 4
The NB2308A is a versatile, 3.3 V zero delay buffer designed to
The NB2308A has two banks of four outputs each, which can be
Multiple NB2308A devices can accept the same input clock and
The NB2308A is available in five different configurations (Refer to
The NB2308Ax2 allows the user to obtain 2X and 1X frequencies
The NB2308Ax4 enables the user to obtain 2X clocks on all outputs.
The NB2308Ax5H is a high-drive version with REF/2 on both
Load on FBK Input
Zero Input - Output Propagation Delay, Adjustable by Capacitive
Multiple Configurations - Refer to NB2308A Configurations Table
Input Frequency Range: 15 MHz to 133 MHz
Multiple Low-Skew Outputs
Output-Output Skew Less than 200 ps
Device-Device Skew Less than 700 ps
Two banks of four outputs, three-stateable by two select inputs
Less than 200 ps Cycle-to-Cycle Jitter
Available in 16-pin SOIC and TSSOP Packages
3.3 V Operation
Industrial Temperature Range
Advanced 0.35 m CMOS Technology
These are Pb-Free Devices
1
*For additional marking information, refer to
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
Application Note AND8002/D.
16
CASE 751B
16
CASE 948F
DT SUFFIX
TSSOP-16
D SUFFIX
SOIC-16
XXXX
A
WL, L
Y
WW, W = Work Week
G or G
(Note: Microdot may be in either location)
ORDERING INFORMATION
1
1
= Device Code
= Assembly Location
= Wafer Lot
= Year
= Pb-Free Package
http://onsemi.com
16
Publication Order Number:
1
16
XXXXXXXXXG
1
DIAGRAMS*
MARKING
AWLYWW
ALYWG
XXXX
XXXX
G
NB2308A/D

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nb2308a Summary of contents

Page 1

... The exact configuration and output frequencies depends on which output drives the feedback pin. The NB2308Ax3 allows the user to obtain 4X and 2X frequencies on the outputs. The NB2308Ax4 enables the user to obtain 2X clocks on all outputs. Thus, the part is extremely versatile, and can be used in a variety of applications. ...

Page 2

... Bank A NB2308Ax2 Bank B NB2308Ax3 Bank A NB2308Ax3 Bank B NB2308Ax4 Bank A or Bank B NB2308Ax5H Bank A or Bank B 1. Output phase is indeterminant (0° or 180° from input clock). If phase integrity is required, use the NB2308Ax2. Table 2. SELECT INPUT DECODING S2 S1 Clock Three-state ...

Page 3

... FBK 3. Weak pulldown. 4. Weak pulldown on all outputs. 5. Weak pullup on these inputs. NB2308A 1 REF NB2308A GND Figure 2. Pin Configuration Description Input reference frequency tolerant input. Buffered clock output, Bank A. Buffered clock output, Bank A. ...

Page 4

... IH I Input LOW Current IL I Input HIGH Current IH V Output LOW Voltage OL V Output HIGH Voltage OH I Supply Current (Note Supply currents are measured for PLL-Bypass Mode ( 0). NB2308A Min -0.5 -0.5 -0.5 -65 Description Industrial Test Conditions (-1, -2, -3, -4) ...

Page 5

... Device-to-Device Skew 7 t Cycle-to-Cycle Jitter J (-1, -1H, -4, -5H) Cycle-to-Cycle Jitter (-2, -3) t PLL Lock Time LOCK NB2308A Test Conditions 30 pF load (all devices load (-1H, -5H load (-1, -2, -3, -4) Measured at 1 < 66.66 MHz OUT 30 pF load Measured at 1 < 50 MHz ...

Page 6

... Figure 6. Output - Output Skew FBK_Device 1 FBK_Device 2 NB2308A To close the feedback loop of the NB2308A, the FBK pin can be driven from any of the eight available output pins. The output driving the FBK pin will be driving a total load plus any additional load that it drives. The relative loading of this output (with respect to the remaining outputs) can adjust the input-output delay ...

Page 7

... V CLKOUT DD OUTPUTS 0 0.1 mF GND GND Figure 9. Test Circuit #1 PLL MUX REF S2 SELECT INPUT DECODING S1 Figure 11. NB2308Ax1 and NB2308Ax1H NB2308A TEST CIRCUITS 0 LOAD 0.1 mF For parameter t BLOCK DIAGRAMS FBK CLKA1 CLKA2 REF CLKA3 S2 CLKA4 S1 CLKB1 CLKB2 CLKB3 CLKB4 http://onsemi.com ...

Page 8

... BLOCK DIAGRAMS FBK CLKA1 B2 CLKA2 CLKA3 REF CLKA4 S2 SELECT INPUT S1 CLKB1 CLKB2 CLKB3 CLKB4 MUX PLL B2 SELECT INPUT DECODING Figure 15. NB2308Ax5H http://onsemi.com 8 FBK CLKA1 CLKA2 PLL MUX CLKA3 CLKA4 DECODING CLKB1 CLKB2 CLKB3 CLKB4 Figure 14. NB2308Ax4 FBK CLKA1 CLKA2 CLKA3 ...

Page 9

... NB2308AI2DTG 2308AI2 NB2308AI2DTR2G 2308AI2 NB2308AI3DG 2308AI3G NB2308AI3DR2G 2308AI3G NB2308AI3DTG 2308AI3 NB2308AI3DTR2G 2308AI3 NB2308AI4DG 2308AI4G NB2308AI4DR2G 2308AI4G NB2308AI4DTG 2308AI4 NB2308AI4DTR2G 2308AI4 NB2308AI5HDG 2308AI5HG NB2308AI5HDR2G 2308AI5HG NB2308AI5HDTG 2308AI5H NB2308AI5HDTR2G 2308AI5H †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Spe‐ ...

Page 10

... -V- C 0.10 (0.004) -T- SEATING D PLANE 16X 0.36 *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. NB2308A PACKAGE DIMENSIONS TSSOP-16 CASE 948F-01 ISSUE Ç Ç Ç 9 É É É ...

Page 11

... D 0.35 0.49 0.014 0.019 F F 0.40 1.25 0.016 0.049 G 1.27 BSC 0.050 BSC J 0.19 0.25 0.008 0.009 K 0.10 0.25 0.004 0.009 5.80 6.20 0.229 0.244 R 0.25 0.50 0.010 0.019 1.27 PITCH ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NB2308A/D ...

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