nm24c02 Fairchild Semiconductor, nm24c02 Datasheet
nm24c02
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nm24c02 Summary of contents
Page 1
... The NM24C02/03 devices are 2048 bits of CMOS non-volatile electrically erasable memory. These devices conform to all speci- fications in the Standard IIC 2-wire protocol and are designed to minimize device pin count, and simplify PC board layout require- ments. The upper half (upper 1Kbit) of the memory of the NM24C03 can be ...
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... Serial Data I/O SCL Serial Clock Input NC No Connection V Power Supply CC A0,A1,A2 Device Address Inputs V Ground SS SDA Serial Data I/O SCL Serial Clock input WP Write Protect V Power Supply CC NM24C02/03 Rev NM24C02 SCL SDA DS500069 ...
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... NM24C02/03 Rev XXX Letter Description N 8-pin DIP M8 8-pin SOIC MT8 8-pin TSSOP None 0 to 70°C V -40 to +125°C E -40 to +85°C Blank 4.5V to 5.5V L 2.7V to 5.5V LZ 2.7V to 5.5V and <1µA Standby Current Blank 100KHz F 400KHz with Write Protect C CMOS Technology ...
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... Input Capacitance (A0, A1, A2, SCL) IN Typical values are T = 25°C and nominal supply voltage of 5V for 4.5V-5.5V operation and at 3V for 2.7V-4.5V operation. A This parameter is periodically sampled and not 100% tested. NM24C02/03 Rev. G Ambient Operating Temperature –65°C to +150°C NM24C02/03 NM24C02E/03E 6.5V to –0.3V NM24C02V/03V Positive Power Supply +300° ...
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... During the write cycle, the WR NM24C02/03 bus interface circuits are disabled, SDA is allowed to remain high per the bus-level pull-up resistor, and the device does not respond to its slave address. Refer "Write Cycle Timing" diagram. ...
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... It is recommended that the total line capacitance be less than 400pF SDA SCL V CC NM24C02/ NM24C02/03 Yes NM24C04/05 No NM24C08/09 No NM24C16/17 No NM24C02/03 Rev. G ACK t WR STOP CONDITION Slave Master Slave Transmitter/ Transmitter Receiver Receiver NM24C02/03 NM24C04/ ...
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... Last bit of the Slave Address indicates if the intended access is Read or Write. If the bit is "1," then the access is Read, whereas if the bit is "0," then the access is Write. NM24C02/03 Rev. G Acknowledge is an active LOW pulse on the SDA line driven by an addressed receiver to the addressing transmitter to indicate receipt of 8-bits of data ...
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... All communications are terminated by a stop condition, which is a LOW to HIGH transition of SDA when SCL is HIGH. The stop condition is also used by the NM24C02/03 to place the device in the standby power mode, except when a Write operation is being executed, in which case a second stop condition is required after ...
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... SCL SDA SCL SDA START CONDITION SCL FROM MASTER DATA OUTPUT FROM TRANSMITTER DATA OUTPUT FROM RECEIVER START CONDITION NM24C02/03 Rev. G DATA STABLE DATA CHANGE CONDITION DS500069-10 STOP DS500069- ACKNOWLEDGE PULSE DS500069-12 www.fairchildsemi.com ...
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... NM24C02/03 will respond with an acknowledge after the receipt of each subsequent eight bit byte. In the read mode the NM24C02/03 slave will transmit eight bits of data, release the SDA line and monitor the line for an acknowl- edge acknowledge is detected, NM24C02/03 will continue to transmit data ...
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... ACK polling can be initiated immediately. This involves issuing the start condition followed by the slave address for a write operation. If the NM24C02/03 is still busy with the write operation no ACK will be returned. If the NM24C02/03 has completed the write operation an ACK will be returned and the host can then proceed with the next read or write operation ...
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... R/W bit set to one. This will be followed by an acknowledge from the NM24C02/03 and then by the eight bit byte. The master will not acknowledge the transfer but does generate the stop condition, and therefore the NM24C02/03 discontinues transmission ...
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... Pin #1 IDENT 0.0433 Max (1.1) 0.0256 (0.65) Typ. Notes: Unless otherwise specified 1. Reference JEDEC registration MO153. Variation AA. Dated 7/93 NM24C02/03 Rev. G 0.228 - 0.244 (5.791 - 6.198) Lead #1 IDENT 0.053 - 0.069 (1.346 - 1.753) 8° Max, Typ. All leads 0.014 0.016 - 0.050 (0.356) (0.406 - 1.270) ...
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... English Français Italiano Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. NM24C02/03 Rev. G 0.373 - 0.400 (9.474 - 10.16) 0.090 (2.286) ...