pcf8566 NXP Semiconductors, pcf8566 Datasheet
pcf8566
Available stocks
Related parts for pcf8566
pcf8566 Summary of contents
Page 1
... DATA SHEET PCF8566 Universal LCD driver for low multiplex rates Product specification Supersedes data of 1997 Apr 02 File under Integrated Circuits, IC12 INTEGRATED CIRCUITS 1998 May 04 ...
Page 2
... Output bank selector 6.17 Input bank selector 6.18 Blinker C-BUS DESCRIPTION 7.1 Bit transfer 7.2 Start and stop conditions 7.3 System configuration 7.4 Acknowledge 2 7.5 PCF8566 I C-bus controller 7.6 Input filters 2 7.7 I C-bus protocol 7.8 Command decoder 7.9 Display controller 7.10 Cascaded operation 1998 May 04 8 LIMITING VALUES 9 HANDLING 10 DC CHARACTERISTICS ...
Page 3
... GENERAL DESCRIPTION The PCF8566 is a peripheral device which interfaces to almost any Liquid Crystal Display (LCD) having low multiplex rates. It generates the drive signals for any static or multiplexed LCD containing up to four backplanes and segments and can easily be cascaded for larger LCD applications ...
Page 4
... I C-BUS 1 FILTERS CONTROLLER SDA BP0 BP2 BP1 BP3 BACKPLANE DISPLAY SEGMENT OUTPUTS OUTPUTS LCD VOLTAGE SELECTOR PCF8566 INPUT BANK SELECTOR DISPLAY CONTROLLER COMMAND DECODER 10 SA0 Fig.1 Block diagram S23 DISPLAY LATCH SHIFT REGISTER DISPLAY OUTPUT RAM BANK ...
Page 5
... SA0 PCF8566 11 V LCD 12 BP0 13 BP2 14 15 BP1 BP3 MGG382 Fig.2 Pin configuration. 5 Product specification PCF8566 40 S23 39 S22 38 S21 37 S20 36 S19 35 S18 34 S17 33 S16 32 S15 31 S14 30 S13 29 S12 28 S11 27 S10 ...
Page 6
... Universal LCD driver for low multiplex rates 6 FUNCTIONAL DESCRIPTION The PCF8566 is a versatile peripheral device designed to interface any microprocessor to a wide variety of LCDs. It can directly drive any static or multiplexed LCD containing backplanes and segments. The display configurations possible with the PCF8566 depend on the number of active backplane outputs required ...
Page 7
... Philips Semiconductors Universal LCD driver for low multiplex rates 6.1 Power-on reset At power-on the PCF8566 resets to a defined starting condition as follows: 1. All backplane outputs are set All segment outputs are set The drive mode ‘ multiplex with 4. Blinking is switched off 5 ...
Page 8
... The static LCD drive mode is used when a single backplane is provided in the LCD. Backplane and segment drive waveforms for this mode are shown in Fig.4. When two backplanes are provided in the LCD the multiplex drive mode applies. The PCF8566 allows use bias in this mode as shown in Figs 5 and 6 ...
Page 9
... Fig.5 Waveforms for multiplex drive mode with 1998 May 04 T frame V LCD )/2 V LCD )/2 (a) waveforms at driver 0 0 (b) resultant waveforms at LCD segment 9 Product specification PCF8566 LCD segments state 1 state 2 At any instant (t): V state 1 ( (t) V BP0 ( on(rms 0.791V op ...
Page 10
... (a) waveforms at driver (b) resultant waveforms at LCD segment 10 Product specification PCF8566 LCD segments state 1 state 2 At any instant (t): V state 1 ( (t) V BP0 ( on(rms 0.745V state 2 ( (t) ...
Page 11
... T frame LCD segments state 1 state 2 (a) waveforms at driver At any instant (t): V state 1 ( on(rms state 2 ( off(rms) = (b) resultant waveforms at LCD segment = Product specification PCF8566 (t) V BP0 ( 0.638V op 9 (t) V BP1 ( 0.333V op 3 MGG395 V . ...
Page 12
... Fig.8 Waveforms for multiplex drive mode: V 1998 May 04 T frame (a) waveforms at driver (b) resultant waveforms at LCD segment = Product specification PCF8566 LCD segments state 1 state 2 At any instant (t): V state 1 ( (t) V BP0 ( on(rms 0.577V state 2 ( ...
Page 13
... CLK (pin 4) then becomes the external DD clock input. 6.8 Timing The timing of the PCF8566 organizes the internal data flow of the device. This includes the transfer of display data from the display RAM to the display segment outputs. In cascaded applications, the synchronization signal SYNC maintains the correct timing relationship between the PCF8566s in the system ...
Page 14
... In multiplexed LCD applications the segment data of the second, third and fourth column of the display RAM are time-multiplexed with BP1, BP2 and BP3 respectively. When display data are transmitted to the PCF8566 the display bytes received are stored in the display RAM according to the selected LCD drive mode. To illustrate the filling order, an example of a 7-segment numeric display showing all drive modes is given in Fig.10 ...
Page 15
Acrobat reader. white to force landscape pages to be ... drive mode LCD segments LCD backplanes BP0 f S ...
Page 16
... Similarly multiplex, bits 0, 1 and 2 are selected sequentially multiplex, bits 0 then 1 are selected and, in the static mode, bit 0 is selected. The PCF8566 includes a RAM bank switching feature in the static and multiplex drive modes. In the static drive mode, the BANK SELECT command may request the contents of bit selected for display instead of bit 0 contents ...
Page 17
... In this event the transmitter must leave the data line HIGH to enable the master to generate a STOP condition. data line change stable; of data data valid allowed Fig.11 Bit transfer. 17 Product specification PCF8566 MBA607 ...
Page 18
... May 04 S Fig.12 Definition of START and STOP conditions. SLAVE SLAVE TRANSMITTER / RECEIVER RECEIVER Fig.13 System configuration Fig.14 Acknowledgement on the I 18 Product specification PCF8566 SDA SCL P STOP condition MBA608 MASTER MASTER TRANSMITTER / TRANSMITTER RECEIVER MBA605 clock pulse for acknowledgement 9 ...
Page 19
... Two I C-bus slave addresses (0111110 and 0111111) are reserved for PCF8566. The least-significant bit of the slave address that a PCF8566 will respond to is defined by the level tied at its input SA0 (pin 10). Therefore, two types of PCF8566 can be distinguished on the same I allows PCF8566s on the same I LCD applications 2 ...
Page 20
... Fig.15 I C-bus protocol last command 1 = commands continue MSB C REST OF OPCODE Fig.16 General format of command byte. 20 Product specification acknowledge by A0, A1 and A2 selected PCF8566 only A DISPLAY DATA byte(s) update data pointers and if necessary, subaddress counter MGG390 LSB MGG388 PCF8566 ...
Page 21
... Philips Semiconductors Universal LCD driver for low multiplex rates Table 5 Definition of PCF8566 commands COMMAND/OPCODE Mode set Load data pointer Device select Bank select Blink Table 6 LCD drive mode ...
Page 22
... SYNC line at the onset of its last active backplane signal 1 and monitors the SYNC line at all other times. Should synchronization in the cascade be lost, it will be restored by the first PCF8566 to assert SYNC. The timing relationships between the backplane waveforms and the BIT BF0 SYNC signal for the various drive modes of the PCF8576 are shown in Fig ...
Page 23
... SCL SYNC 3 PCF8566 CLK OSC Fig.17 Cascaded PCF8566 configuration. 23 Product specification PCF8566 24 segment drives LCD PANEL (up to 1536 elements) BP0 to BP3 11 (open-circuit) SA0 segment drives 4 backplanes BP0 to BP3 11 MGG384 SA0 V SS ...
Page 24
... BP1 (1/2 bias) BP1 (1/3 bias) SYNC BP2 SYNC BP3 SYNC Fig.18 Synchronization of the cascade for the various PCF8566 drive modes. For single plane wiring of PCF8566s, see Chapter “Application information”. 1998 May frame frame (a) static drive mode. ( multiplex drive mode. ...
Page 25
... HANDLING Inputs and outputs are protected against electrostatic discharges in normal handling. However totally safe advised to take handling precautions appropriate to handling MOS devices (see “Handling MOS devices” ). 1998 May 04 PARAMETER current 25 Product specification PCF8566 MIN. MAX. UNIT 0 ...
Page 26
... TYP. 2 LCD ; C-bus inactive. Product specification PCF8566 MAX. UNIT 150 100 ...
Page 27
... Product specification MIN. TYP. 125 200 315 400 4.7 4 4.7 4 4.7 0 250 1 300 4 1.5 k SDA, SCL V DD (pins S23 I load 15 A MGG387 PCF8566 MAX. UNIT kHz kHz ...
Page 28
... BUF SCL SDA MGA728 1998 May CLK t CLKH t CLKL t PSYNC t SYNCL t PLCD Fig.20 Driver timing waveforms. t LOW t t HD;DAT t r HD;STA t SU;STA 2 Fig.21 I C-bus timing waveforms. 28 Product specification PCF8566 0.7V DD 0.3V DD 0.7V DD 0. 0.5 V MGG391 SU;DAT t HIGH t SU;STO ...
Page 29
... Segment output impedance S0 to S23 ( +85 C. Fig.23 Typical characteristics of LCD outputs Low power mode; V LCD external clock = 35 kHz Product specification PCF8566 MGG398 ( MGG400 ( ...
Page 30
... SA0 LCD 12 BP0 13 PCF8566 BP2 14 BP1 15 BP3 BACKPLANES Fig.24 Single plane wiring of package PCF8566s. S23 40 1 S22 39 2 S21 38 3 S20 37 4 S19 36 5 S18 S17 7 S16 33 8 S15 32 9 S14 ...
Page 31
... May 04 (1) 2 PCF8566 Fig.25 Bonding pad locations. 31 Product specification BP1 14 BP2 13 BP0 12 V LCD (1) 2. SA0 OSC MBH783 PCF8566 ...
Page 32
... S12 1080 S13 1080 S14 1080 S15 1080 S16 1080 S17 1080 S18 1080 S19 1056 S20 830 S21 630 S22 430 S23 230 32 Product specification PCF8566 y PIN 1235 1 1235 2 1235 3 1235 4 1235 5 1025 6 825 7 625 8 425 9 225 347 ...
Page 33
... E 1 1.70 0.53 0.36 52.50 14.1 1.14 0.38 0.23 51.50 13.7 0.067 0.021 0.014 2.067 0.56 0.045 0.015 0.009 2.028 0.54 REFERENCES JEDEC EIAJ MO-015AJ 3.60 15.80 17.42 2.54 15.24 3.05 15.24 15.90 0.14 0.62 0.10 0.60 0.12 0.60 EUROPEAN PROJECTION Product specification PCF8566 SOT129 ( max. 0.254 2.25 0.69 0.01 0.089 0.63 ISSUE DATE 92-11-17 95-01-14 ...
Page 34
... REFERENCES JEDEC EIAJ detail 1.7 1.15 0.2 0.1 2.25 1.5 1.05 0.067 0.045 0.089 0.008 0.004 0.059 0.041 EUROPEAN PROJECTION Product specification PCF8566 SOT158 ( 0.6 0.1 0 0.024 0.004 0.012 ISSUE DATE 92-11-17 95-01-24 ...
Page 35
... Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds 300 C. When using a dedicated tool, all other leads can be soldered in one operation within seconds between 270 and 320 C. 35 Product specification PCF8566 ...
Page 36
... Philips. This specification can be ordered using the code 9398 393 40011. 1998 May 04 C COMPONENTS 2 C components conveys a license under the Philips’ system provided the system conforms to the I 36 Product specification PCF8566 2 C patent to use the 2 C specification defined by ...
Page 37
... Philips Semiconductors Universal LCD driver for low multiplex rates 1998 May 04 NOTES 37 Product specification PCF8566 ...
Page 38
... Philips Semiconductors Universal LCD driver for low multiplex rates 1998 May 04 NOTES 38 Product specification PCF8566 ...
Page 39
... Philips Semiconductors Universal LCD driver for low multiplex rates 1998 May 04 NOTES 39 Product specification PCF8566 ...
Page 40
Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 160 1010, ...