peb4266 Infineon Technologies Corporation, peb4266 Datasheet
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Edition 2006-10-09 Published by Infineon Technologies AG 81726 München, Germany Infineon Technologies AG 2006. © All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”). ...
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SLIC-P Subscriber Line Interface Circuit Enhanced Power Management Revision History: 2006-10-09, Revision 5.0 Previous Version: Revision 4.0 Page Subjects (major changes since last revision) all Package P-/PG-VQFN-48-4 changed to PG-VQFN-48-15 all Package P-/PG-DSO-20-24 changed to PG-DSO-20-24 Page 35 “Recommended PCB ...
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Table of Contents Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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List of Figures Figure 1 Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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List of Tables Table 1 Pin Definitions and Functions PEB 4266 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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General Description The High Voltage Subscriber Line Interface Circuit SLIC-P (PEB 4266 reliable interface between the telephone line and the codec devices of the DuSLIC Technologies´ well-proven Smart Power Technology SPT 170. Due to the integrated triple ...
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Subscriber Line Interface Circuit Enhanced Power Management SLIC-P Version 1.2 1.1 Features • High-voltage line feeding V V • 3 Battery voltages ( , BATL BATH –15 V … –150 V V • Extended voltage range (3 5.5 ...
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Logic Symbol Tip/Ring interface Power supply Figure 1 Logic Symbol 1.3 Pin Configuration Please note: pin counting is clockwise ! Figure 2 Pin Configuration PG-DSO-20-24 Package (top view) Note: The PG-DSO-20-24 package is designed with heatsink on top. The ...
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N.C. TIP N.C. BGND N.C. VDD VBATL VBATH VBATR N.C. AGND N.C. Figure 3 Pin Configuration PG-VQFN-48-15 Package (top view) Attention: The exposed die pad and die pad edges are connected to VBATR via the chip substrate. Due to the ...
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Table 1 Pin Definitions and Functions PEB 4266 (cont’d) Pin No. Pin No. Name Pin PG- PG- Type DSO- VQFN- 20-24 48- Power BATR 9 47 AGND Power 10 2 CEXT VCMS I 12, ...
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BGND PDRR PDRRL PDRH PDRHL TIP RING PDRR PDRRL VBATL VBATH VBATR (SUB) Figure 4 Block Diagram Preliminary Data Sheet PEB 4266 ( Off-hook ( Current ( sensor T ...
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Functional Description The SLIC-P supports AC and DC control loops based on feeding a voltage I transversal line current and the longitudinal current Trans In receive direction DC and AC voltages are handled separately with different gains on the ...
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Figure 5 Definition of Output Current Directions 2.1 Operating Modes The SLIC-P (PEB 4266) operates in the following modes controlled by ternary logic signals at C1, C2 and a binary signal at C3: Table 2 SLIC-P Interface Code L 1) ...
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Table 3 SLIC-P Modes (cont’d) SLIC-P Mode Mode Description HIRT High Impedance on RING and TIP HIT High Impedance on TIP (RING current limitation of 90 mA) HIR High Impedance on RING (TIP current limitation of 90 mA) ROR Ring ...
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Current Limitation / Overtemperature According to the application requirements the output current limit for SLIC-P can be selected by C3 (see With the total current delivered by the output drivers is limited to typically 90 mA ...
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Typical Application Circuit for DuSLIC Figure 6 (Figure 7) shows one channel of an application including SLIC-P and SLICOFI 4VIP/-4M (please refer to the latest DuSLIC components for a dual-channel solution according to Table 4 External Components DuSLIC Qu. ...
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Figure 6 Application Circuit DuSLIC Preliminary Data Sheet Typical Application Circuit for DuSLIC® and VINETIC® ® 18 SLIC-P PEB 4266 Revision 5.0, 2006-10-09 ...
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Figure 7 Application Circuit VINETIC Preliminary Data Sheet Typical Application Circuit for DuSLIC® and VINETIC® ® 19 SLIC-P PEB 4266 Revision 5.0, 2006-10-09 ...
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Electrical Characteristics 4.1 Absolute Maximum Ratings Table 5 Absolute Maximum Ratings Parameter Symbol V Battery voltage low BATL V Battery voltage high BATH V Battery voltage R BATR V V Battery voltage – BATL V V difference – BATH ...
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Table 7 Current Limits on Output Pins Duration of Current Pins Continuous TIP, RING < 100 s TIP, RING < TIP, RING The above limits ( Table 6 and Table 7 simultaneously. Together with external circuitry they determine ...
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Electrical Parameters Minimum and maximum values are valid within the full operating range. Testing is performed according to the specific test figures +3 Functionality and performance is guaranteed for T range operation at –40 ...
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Table 10 Supply Currents, Power Dissipation ( Parameter Symbol High Impedance on RING and TIP V I current current BATH BATH V I current BATL BATL V I current BATR BATR 1) Current depending on supply ...
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DC Characteristics Table 13 DC Characteristics Parameter Symbol Line Termination TIP, RING V DC line voltage TR TIP line voltage drop – BATH V (see ) – Figure 8 TR, max I Output current ...
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Table 13 DC Characteristics (cont’d) Parameter Symbol Inputs DCP, DCN, ACP, ACN, VCMS R Input resistance DC DCP, DCN R Input resistance AC ACP, ACN Output resistance on C EXT Current Outputs IT output current (see IT ...
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Figure 8 Typical Buffer Voltage Drop in all Operating Modes 4.5.3 AC Characteristics If not otherwise stated, AC characteristics are tested line current of 25 ...
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Table 14 AC Characteristics (cont’d) Parameter Symbol TLRR Transversal to longitudinal rejection V V ratio / (see TR long Figure 19 ) PSRR Power supply rejection ratio BATL BATH ...
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Figure 9 Typical Frequency Dependence of PSRR 0.1 Figure 10 Typical Frequency Dependence of PSRR Preliminary Data Sheet PSRR BATL ...
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Figure 11 Typical Frequency Dependence of PSRR 0.1 Figure 12 Typical Frequency Dependence of PSRR Preliminary Data Sheet PSRR BATR ...
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Test Figures or V connected to BGND, VBATH (ACTH) BGND, VBATL (ACTL) BGND (ACTR Figure 13 ...
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Figure 15 Current Outputs IT ...
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300 TR lon g 300 30 15 ...
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300 long 300 Figure 19 Transversal to Longitudinal Rejection 450 V RNG 3 ...
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Package Outlines 6.1 PG-DSO-20-24 Package 1.1 -0.3 1.27 +0.13 0 45˚ Index Marking 1) Does not include plastic or metal protrusion of 0.15 max. per side Figure 21 PG-DSO-20-24 (Plastic Green Dual Small Outline) Notes 1. Dimensions ...
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PG-VQFN-48-15 Package Figure 22 PG-VQFN-48-15 (Plastic Green Very Thin Profile Quad Flat Non Leaded) Note: Dimensions in mm. Attention: The exposed die pad and die pad edges are connected to VBATR via the chip substrate. Due to the high ...
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References [1] SLIC-S/-S2 / TSLIC-S (PEF 4264/-2 / PEF 4364) Application Note “Protection for SLIC-S/-S2 against Overvoltages and Overcurrents according to ITU-T K. 20/K.21/K.45” Rev. 1.0, 2003-07-18 ® [2] VINETIC Version 1.4 Prel. Application Note External Components Rev. 2.0, 2005-09-06 ...
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Published by Infineon Technologies AG ...