sc28l198 NXP Semiconductors, sc28l198 Datasheet
sc28l198
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sc28l198 Summary of contents
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... SC28L198 Octal UART for 3.3 V and 5 V supply voltage Product data sheet Supersedes data of 1999 Jan 14 INTEGRATED CIRCUITS 2006 Aug 10 ...
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... Product data sheet SC28L198 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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... TTL input levels. Outputs switch between full V High speed CMOS technology 84 pin PLCC 100 pin LQFP Industrial Industrial Industrial Industrial – +85 C – +85 C SC28L198A1A SC28L198A1A SC28L198A1BE SC28L198A1BE 3 Product data sheet SC28L198 and DWG # 1 SOT189-2 SOT407–1 ...
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... Gin1 49 I/O3h 50 I/O2h 51 I/O1h 52 I/O0h 53 Vss 54 RxDh 55 TxDh 56 I/O3g 4 Product data sheet SC28L198 Pin Function 57 I/O2g 58 I/O1g 59 I/O0g 60 RxDg 61 TxDg TxDf 66 I/O3f 67 I/O2f 68 I/O1f 69 I/O0f 70 TxDe 71 I/O3e 72 I/O2e 73 ...
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... I/O2f I/O1f I/O0f OUT I/O3h 70 TxDe I/O2h 71 I/O3e I/O1h 72 I/O2e I/O0h 73 I/O1e V 74 RxDf N Product data sheet SC28L198 Pin Function 76 N/C 77 RxDe 78 I/O0e 79 IRQN IACKN 86 Sclk ...
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... This product includes circuitry specifically designed for the protection of its internal devices from damaging effects of excessive static charge. 2006 Aug 10 CC PARAMETER Product data sheet SC28L198 RATING UNIT See Note 3 ºC –65 to +150 ºC –0.5 to +7.0 V –0.5 to Vcc + 0 ...
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... C4 time and occurs approximately 18 ns after the rising edge of C4. Addressing of the various functions of the OCTART is through the address bus A(7:0). The 28L198 is compatible with the SC28L198 OCTAL UART in software and function. A[7 general sense, is used to separate the data portion of the circuit from the control portion ...
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... Interrupt Status Register (ISR). The setting of these bit(s) will initiate any of the automatic sequences or and/or an interrupt that may have enabled via the MR0 register. The characters of the recognition system are not controlled by the – 1 software or hardware reset. They do not have a pre-defined “reset 8 Product data sheet SC28L198 ...
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... TxFIFO not possible to load the TxFIFO and then enable the transmission. Note the difference between transmitter disable and transmitter reset. The transmitter may by reset by a hardware or software. The 9 Product data sheet SC28L198 ...
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... The first three are appended to each byte and stored in the RxFIFO. The last two are not necessarily related to the a byte being received or a byte that is in the RxFIFO. They are however developed by the receiver state machine 10 Product data sheet SC28L198 ...
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... KHz baud rate and will signal a change when a transition has been stable for two rising edges of this clock. Thus a level on the I/O ports must be stable for Defining a port as an output will disable the COS detector at that port. The condition of 11 Product data sheet SC28L198 ...
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... Aug 10 accomplished by redefining the meaning of the parity bit such that it indicates a character as address or data. While this method is fully supported in the SC28L198 it also supports recognition of the character itself. Upon recognition of its address the receiver will be enabled and data pushed onto the RxFIFO. ...
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... This results in channel D having the highest arbitration number. The decreasing order all other parts of an arbitration are equal then the channel number will determine which channel will dominate in the arbitration process . 13 Product data sheet SC28L198 ...
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... All status bits, interrupt conditions and processor interface operate normally recommended that this mode be used when initially verifying processor to UART interface. The communication between the transmitter and receiver is entirely within the UART – essentially ”talking to itself”. 14 Product data sheet SC28L198 B4 B3 Bits 2:0 1 Channel No 1 ...
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... If other interrupt sources are active, the IRQN pin may remain low. Wake Up Mode The SC28L198 provides two modes of this common asynchronous “party line” protocol: the new automatic mode with 3 sub modes and the default Host operated mode. The automatic mode has several sub modes (see below) ...
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... Xon/Xoff logic will not automatically send the negating Xon. Host mode When neither the auto–receiver nor auto–transmitter modes are set, the Xon/Xoff logic is operating in the host mode. In host mode, all 16 Product data sheet SC28L198 Character ...
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... The X Interrupt Status Register, XISR, can be read for details of the interrupt and to examine other, non–interrupting, status of the Xon/Xoff logic. Refer to the XISR in the Register Descriptions. The character recognition function and the associated interrupt generation is disabled on hardware or software reset. 17 Product data sheet SC28L198 ...
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... RxRDY bit) and the transmitter is enabled, the transmitter will remain in auto–echo mode until the end of the transmission of the stop bit. 18 Product data sheet SC28L198 Bit 0 Power Down Mode 0 – Device enabled 1 – Power down ...
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... FIFO. In the block mode, the status provided in the SR for these bits is the accumulation (logical OR Product data sheet SC28L198 Bit 1:0 Address Recognition control 00 – none 01 – Auto wake 10 – ...
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... MR2[4] – Clear to Send Control The state of this bit determines if the CTSN input (I/O0) controls the operation of the transmitter. If this bit is 0, CTSN has no effect on 20 Product data sheet SC28L198 Bit 1:0 Stop Length 9/16 ...
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... Product data sheet SC28L198 Clock selection, CCLK = 3.6864 MHz BRG – 19.2K BRG – 28.8K BRG – 38.4K BRG – 57.6K BRG – 115.2K BRG – 230. BRG C/T 0 ...
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... I/O operations. 10101 Reserved for channels b-h, for channel a: executes a Gang Load of Xoff Character Registers. Executing this command causes a write of the value x’13 to all channel’s Xoff character registers. This command provides a 22 Product data sheet SC28L198 ...
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... This bit, when set, indicates that a stop bit was not detected when the corresponding data character in the FIFO was received. The stop bit check is made in the middle of the first stop bit position. 23 Product data sheet SC28L198 Bit 1 Bit 0 RxFULL RxRDY 0 – – ...
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... FIFO is full, the bit is set again when the waiting character is transferred into the FIFO. The other two conditions of these bits, 3/4 and half full operate in a similar manner. The ISR[1] bit is set when the RxFIFO fill level 24 Product data sheet SC28L198 Bit 0 TxRDY Transmitter has entered arbitration process ...
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... Change of State, COS, interrupt. Table 17. BCRx – Bidding Control Register – Xon Bits 7:3 Bits 2:0 Reserved MSB of an Xon/Xoff interrupt bid This register provides the 3 MSBs of the Interrupt Arbitration number for an Xon/Xoff interrupt. 25 Product data sheet SC28L198 Bit 0 TxRDY inter- rupt ...
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... An 8 bit character register that contains the compare value for an Xoff character. Table 21. ARCR – Address Recognition Character Register Bits 7:0 8 Bits of the Multi–Drop Address Character Recognition An 8 bit character register that contains the compare value for the wake–up address character 26 Product data sheet SC28L198 ...
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... In other words the receivers and transmitters will always be in the 16x ode of operation when the internal BRG timer is selected for their clock. 27 Product data sheet SC28L198 Bits 1:0 TxD character status 00 – normal TxD data 01 – wait on normal data 10 – ...
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... Bits 7:3 111 = h Reserved A register associated with the interrupting channel as defined in the CIR. It contains the interrupting channel code for all interrupts. 28 Product data sheet SC28L198 Bits 4:3 Bits 2:0 Will be replaced Replaced with inter- with current inter- rupting channel num- rupt type if IVC field ber if IVC field of of GCCR > ...
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... I/OPIOR[3:0] bits hold the datum which is the inverse of the datum driven to its associated I/O pin when the I/OPCR control bits for that pin are programmed to b’01. 29 Product data sheet SC28L198 Bit 2:0 Other types 000 – not ”other” type 001 – Change of State 010 – ...
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... Data Sel GPOR(3) GPOR( ’1’ ’1’ ’0’ ’0’ GPOR3N 10 = GPOR2N 11 = reserved 11 = reserved 30 Product data sheet SC28L198 Bits 1:0 I/O0 control 00 – GPI/CTSN input 01 – I/OPIOR[0]output 10 – TxC1x output 11 – TxC16x output Bit 2 Bit 1 Bit 0 GPOR(2) GPOR(1) GPOR(0) Bits 3:2 ...
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... IN 1/O3a REGISTER MAPS The registers of the SC28L198 are partitioned into two groups: those used in controlling data channels and those used in handling the actual data flow and status. Below is shown the general configuration of all the register addressed. The ”Register Map Summary” shows the configuration of the lower four bits of the address that is the same for the individual UARTs ...
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... BCRAa Xon Character Reg a (XonCRa) Xoff Character Reg a (XoffCRa) Address Recognition Character a (ARCRa) Reserved Receiver Clock Select Register a (RxCSRa) Test Register Xmit Clock Select Register a TxCSRa) Global Chip Configuration Reg GCCR) 32 Product data sheet SC28L198 Acronym Read/Write MR2 R ISR R ...
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... Mode Register 1 MR1c I/O Port Configuration Reg c I/OPCRc BCRBRKc BCRCOSc Reserved BCRXc BCRAc Xon Character Reg c (XonCRc) Xoff Character Reg c (XoffCRc) Address Recognition Character c (ARCRc) Reserved Receiver Clock Select Register c (RxCSRc) Reserved Xmit Clock Select Register c (TxCSRc) Reserved 33 Product data sheet SC28L198 Write Write ...
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... Mode Register 1 MR1e I/OPort Configuration Reg e I/OPCRe BCRBRKe BCRCOSe Reserved BCRXe BCRAe Xon Character Reg e (XonCRe) Xoff Character Reg e (XoffCRe) Address Recognition Char e (ARCRe) Reserved Receiver Clock Select Register e (RxCSRe) Reserved Xmit Clock Select Register e (TxCSRe) Reserved 34 Product data sheet SC28L198 Write Write ...
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... Mode Register 1 MR1g I/OPort Configuration Reg g I/OPCRg BCRBRKg BCRCOSg Reserved BCRXg BCRAg Xon Character Reg g (XonCRg) Xoff Character Reg g (XoffCRg) Address Recognition Char g (ARCRg) Reserved Receiver Clock Select Register g (RxCSRg) Reserved Xmit Clock Select Register g (TxCSRg) Reserved 35 Product data sheet SC28L198 Write ...
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... Mode Register 1 MR1h I/OPort Configuration Reg h I/OPCRh BCRBRKh BCRCOSh Reserved BCRXh BCRAh Xon Character Reg h (XonCRh) Xoff Character Reg h (XoffCRh) Address Recognition Char h (ARCRh) Reserved Receiver Clock Select Register h (RxCSRh) Reserved Xmit Clock Select Register h (TxCSRh) Reserved 36 Product data sheet SC28L198 ...
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... Transmitter FIFO Reg b (TxFIFOb) BRG Timer Reg Lower a (BRGTRLa) Reserved I/O Port Interrupt and Output b (I/OPIORb) Reserved GP Output Reg (GPOR) Reserved GP Out Data Reg (GPOD) BRG Timer Control Reg (BRGCTCR) Reserved BRG Timer Reg Lower b (BRGTRLb) Reserved Reserved Reserved 37 Product data sheet SC28L198 Write Write ...
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... Reserved Reserved Reserved UART D Read Mode Register d (MR2d) Command Register d (CRd) Interrupt Mask Register d (IMRd) Transmitter FIFO Reg d (TxFIFOd) Reserved I/O Port Interrupt and Output d (I/OPIORd) Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved 38 Product data sheet SC28L198 Write Write ...
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... Reserved Reserved Reserved Reserved Reserved UART F Mode Register f (MR2f) Command Register f (CRf) Interrupt Mask Register f (IMRf) Transmitter FIFO Reg f (TxFIFOf) Reserved I/O Port Interrupt and Output f (I/OPIORf) Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved 39 Product data sheet SC28L198 Write ...
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... Reserved Reserved Reserved Reserved Reserved UART H Mode Register h (MR2h) Command Register h (CRh) Interrupt Mask Register h (IMRh) Transmitter FIFO Reg h (TxFIFOh) Reserved I/O Port Interrupt and Output h (I/OPIORh) Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved 40 Product data sheet SC28L198 Write ...
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... Limitations: Minimum RESETN pin pulse width is 10 SClk cycles after Vcc reaches operational range The user must allow a minimum of 6 SClk cycles to elapse after a reset (RESETN pin or CRa initiated) of the device terminates before initiating a new bus cycle. 41 Product data sheet SC28L198 ...
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... TTL Input levels CMOS input levels CMOS input levels . For testing, all inputs swing between 0.4 V and 2.4 V with a transition time 5.6 volts. A worst–case environment Product data sheet SC28L198 LIMITS UNIT 1 MIN TYP MAX V 0 2.0 Vcc 0.8V Vcc CC 0 ...
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... RxD data setup time to RxC high (data) RXS t RxD data hold time from RxC high (data) RXH ts RxD data low time for receiving a valid Start Bit STRT 2006 Aug 10 PARAMETER Product data sheet SC28L198 LIMIT UNIT MIN TYP MAX 10 Sclk ...
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... Delay is from CEN high in Async mode to IRQN inactive, from end IRQN inactive in Sync mode. 4. The minimum frequency values are not tested, but are guaranteed by design. 5. 1MHz specification is for crystal operation. 2006 Aug 10 PARAMETER (0.8V) IL (2.0V Product data sheet SC28L198 LIMITS UNIT MIN TYP MAX ...
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... TTL Input levels CMOS input levels CMOS input levels . For testing, all inputs swing between 0.4 V and 2.4 V with a transition time 5.6 volts. A worst–case environment Product data sheet SC28L198 LIMITS 1 MIN TYP MAX UNIT ...
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... RxD data low time to for receiving a valid Start Bit STRT Sclk Timing t Min low time at Vil (0.8V) SCLKL t Min high time at Vih (2.0V) SCLKH 2006 Aug 10 PARAMETER PARAMETER MIN IRQN inactive -15 46 Product data sheet SC28L198 LIMITS UNIT UNIT TYP MAX 10 Sclk ...
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... Delay is from CEN high in Async mode to IRQN inactive, from end IRQN inactive in Sync mode. 4. The minimum frequency values are not tested, but are guaranteed by design. 5. 1MHz specification is for crystal operation. 2006 Aug 10 PARAMETER PARAMETER MIN 0 Product data sheet SC28L198 (Continued) LIMITS UNIT UNIT TYP MAX 20 MHz 5 ns 3.6864 4 MHz 52 ...
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... Figure 2. Basic Write Cycle, ASYNC RWH VALID VALID INVALID DAK DLY Figure 3. Basic Write Cycle, SYNC 48 Product data sheet SC28L198 RWD INVALID VALID INVALID t DS DAK DAK DLY DLY C4 CEN HIGH t DH SD00194 STP INVALID ...
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... RWH VALID VALID DATA= DAK DAK DLY C4 C4 END Figure 5. Basic Read Cycle, SYNC 49 Product data sheet SC28L198 RWD INVALID VALID INVALID DAK DLY C4 DAK DLY CEN SD00196 STP INVALID ...
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... X1 = 20PF 28C198 X1 3pF 50 KOHMs TO 150 KOHMs X2 4pF TYPICAL CRYSTAL SPECIFICATION FREQUENCY: LOAD CAPACITANCE (C L TYPE OF OPERATION: Figure 7. X1/X2 Communication Crystal Clock 50 Product data sheet SC28L198 C4 INVALID VALID INVALID DAK DLY DAK DLY CEN SD00525 HIGH +5V 1K required for TTL gate. X1 ...
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... Frx Ftx Figure 10. Tx/Rx Clock Timing, External t RXH RxD t RXS t TXD TxD Figure 11. Transmitter and Receiver Timing In the synchronous mode extended IACKN signal cycle will start another IACKN. (This may not be desired but is allowed) 51 Product data sheet SC28L198 SD00199 TC/TO SD00200 TC/TO SD00201 SD00202 ...
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... Multidrop mode Overrun error Parity error, 10 Pin Description, 5 Pinout, 4 Polling Receiver, 9 Receiver FIFO, 10, 24 Receiver Status Bits, 9 REGISTER DESCRIPTIONS, 17 Register Map, 30 Register Map, Control, 30, 31 Register Map, Data, 31, 36 Reset Conditons, 40 RxCSR , 20 RxFIFO Product data sheet SC28L198 ...
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... Wake up mode, 11 Wake Up modes, 14 Wake up. Default, 14 Watch–dog Timer , 14 Watch–dog Timer Enable Register, 26 WDTRCR XISR, 26 Xoff Character Register, 25 XoffCR, 25 Xon /Xoff characters , 15 Xon Character Register, 25 Xon–Xoff Interrupt Status Register, 26 Xon/Xoff modes, 15 Xon/Xoff Operation, 15 XonCR , 25 53 Product data sheet SC28L198 ...
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... Philips Semiconductors Octal UART for 3.3 V and 5 V supply voltage PLCC84: plastic leaded chip carrier; 84 leads 2006 Aug 10 54 Product data sheet SC28L198 SOT189-2 ...
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... Philips Semiconductors Octal UART for 3.3 V and 5 V supply voltage LQFP100: plastic low profile quad flat package; 100 leads; body 1.4 mm 2006 Aug 10 55 Product data sheet SC28L198 SOT407-1 ...
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... Product specification (9397 750 04754). ECN #853–2047 20654. Supersedes data of 1998 Nov 04. _4 19981104 Preliminary specification (9397 750 04754). Supersedes data of 1998 Sep 21. _3 19980921 Preliminary specification (9397 750 04366). Replaces data sheet SC28C198_SC28L198_2 of of 1998 Feb 06. 2006 Aug 10 56 Product data sheet SC28L198 ...
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... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. Koninklijke Philips Electronics N.V. 2006. For more information, please visit http://www.semiconductors.philips.com. For sales office addresses, email to: sales.addresses@www.semiconductors.philips.com. 57 Product data sheet SC28L198 All rights reserved. Date of release: 20060810 Document identifier: SC28L198_6 ...