SG6860 Fairchild Semiconductor, SG6860 Datasheet
SG6860
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SG6860 Summary of contents
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... SG6860’s output driver is clamped at 17V. SG6860 controllers can improve the performance and reduce the production cost of power supplies. The SG6860 can replace linear and RCC-mode power adapters available in 8-pin DIP and 6-pin SOT-26 packages. ...
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... Application Diagram www.DataSheet4U.com Block Diagram © 2008 Fairchild Semiconductor Corporation SG6860 • Rev. 1.0 10µ SG6860 Figure 1. Typical Application Figure 2. Function Block Diagram 2 www.fairchildsemi.com ...
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... Connection. 7 (2) FB Feedback. 8 (1) GND Ground. For ATX SMPS, it detects AC line voltage through the main transformer. © 2008 Fairchild Semiconductor Corporation SG6860 • Rev. 1.0.1 Figure 4. SOT Pin Configuration (Top View) , and a 70kHz switching frequency results in a 13µA I www.fairchildsemi.com ...
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... The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol T Operating Ambient Temperature A © 2008 Fairchild Semiconductor Corporation SG6860 • Rev. 1.0.1 Parameter SOT DIP Parameter 4 Min. Max. ...
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... Output Voltage Low GATE-L V Output Voltage High GATE-H t Rising Time r t Falling Time f V GATE- Output Clamp Voltage CLAMP © 2008 Fairchild Semiconductor Corporation SG6860 • Rev. 1.0.1 Conditions V =V – 0.1V DD DD-ON V =15V, GATE with DD 1nF to GND Latch off Latch off V = =95KΩ ...
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... Temperature (℃) Figure 5. V DD-ON 15.0 13.0 11.0 9.0 7.0 5.0 -40 -25 - Temperature (℃) Figure 7. I DD-ST 67.0 66.8 66.6 66.4 66.2 66.0 -40 -25 - Temperature (℃) Figure 9. f OSC © 2008 Fairchild Semiconductor Corporation SG6860 • Rev. 1.0.1 9.6 9.4 9.2 9.0 8.8 8 110 125 vs 3.5 3.3 3.1 2.9 2.7 2.5 -40 -25 - 110 125 vs 75.0 74.6 74.2 73.8 73.4 73.0 50 ...
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... Temperature (℃) Figure 11. V FB-N 400 360 320 280 240 200 -40 -25 - Temperature (℃) Figure 13. t LEB © 2008 Fairchild Semiconductor Corporation SG6860 • Rev. 1.0.1 (Continued) 2.30 2.26 2.22 2.18 2.14 2.10 -40 -25 - 110 125 vs 110 125 vs ...
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... This UVLO hysteresis window ensures that the hold-up capacitor is adequate to supply V Gate Output The SG6860 BiCMOS output stage is a fast totem pole gate driver. Cross conduction has been avoided to minimize heat dissipation, increase efficiency, and enhance reliability. The output driver is clamped by an internal 17V Zener diode to protect power MOSFET transistors against undesired over-voltage gate signals ...
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... Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ © 2008 Fairchild Semiconductor Corporation SG6860 • Rev. 1.0 ...
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... Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ © 2008 Fairchild Semiconductor Corporation SG6860 • Rev. 1.0.1 (Continued ...
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... Fairchild Semiconductor Corporation SG6860 • Rev. 1.0.1 11 www.fairchildsemi.com ...