Si8244 SILABS [Silicon Laboratories], Si8244 Datasheet

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Si8244

Manufacturer Part Number
Si8244
Description
CLASS D AUDIO DRIVER WITH PRECISION DEAD-TIME GENERATOR
Manufacturer
SILABS [Silicon Laboratories]
Datasheet

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Si8244BB-C-IS1
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Si8244CB-C-IS1
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C
Features
Applications
Description
The Si824x isolated driver family combines two isolated drivers in a single
package. The Si8241/44 are high-side/low-side drivers specifically targeted at
high-power (>30 W) audio applications. Versions with peak output currents of
0.5 A (Si8241) and 4.0 A (Si8244) are available. All drivers operate with a
maximum supply voltage of 24 V.
Based on Silicon Labs' proprietary isolation technology, the Si824x audio drivers
incorporate input-to-output and output-to-output isolation, which enables level-
translation of signals without additional external circuits as well as use of bipolar
supply voltage up to ±750 V. The Si824x audio drivers feature an integrated dead-
time generator that provides highly precise control for achieving optimal THD.
These products also have overlap protection that safeguards against shoot-
through current damage. The CMOS-based design also provides robust immunity
from latch-up and high-voltage transients. The extremely low propagation delays
enable faster modulation frequencies for an enhanced audio experience. The TTL
level compatible inputs with >400 mV hysteresis are available in PWM input
configuration; other options include UVLO levels of 8 V or 10 V. These products
are available in narrow body SOIC packages.
Functional Block Diagram
Rev. 0.2 2/11
L A S S
0.5 A peak output (Si8241)
4.0 A peak output (Si8244)
PWM input
High-precision linear programmable
dead-time generator

High latchup immunity >100 V/ns
Up to 1500 Vrms output-output
isolation, supply voltage of ±750 V
Class D audio amplifiers
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
0.4 ns to 1 µs
D A
DISABLE
GNDI
PWM
VDDI
DT
U D I O
UVLO
Time, Control Gating
Programmable Dead
D
Si8241/44
R I V E R WI TH
Copyright © 2011 by Silicon Laboratories
Input to output isolation for low noise
(up to 2500 V)
Up to 8 MHz operation
Wide operating range

Transient immunity >45 kV/µs
RoHS-compliant

–40 to +125 °C
SOIC-16 narrow body
P
VDDA
GNDA
VDDB
VOB
GNDB
VOA
R E C I S I O N
D
E AD
Patents Pending
DISABLE
- T
PWM
GNDI
Ordering Information:
VDDI
VDDI
I M E
NC
NC
DT
SOIC-16 (Narrow)
Pin Assignments
See page 25.
1
2
3
4
5
6
7
8
Si824x
Si8241/44
G
E N E R A T O R
13
16
15
14
12
11
10
9
VDDA
VOA
GNDA
NC
NC
VDDB
VOB
GNDB
Si824x

Related parts for Si8244

Si8244 Summary of contents

Page 1

... The Si824x isolated driver family combines two isolated drivers in a single package. The Si8241/44 are high-side/low-side drivers specifically targeted at high-power (>30 W) audio applications. Versions with peak output currents of 0.5 A (Si8241) and 4.0 A (Si8244) are available. All drivers operate with a maximum supply voltage Based on Silicon Labs' proprietary isolation technology, the Si824x audio drivers ...

Page 2

Si824x 2 Rev. 0.2 ...

Page 3

T C ABLE O F ONTENTS Section 1. Top-Level Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 4

Si824x 1. Top-Level Block Diagram PWM LPWM DT VDDI VDDI UVLO DISABLE LPWM GNDI Figure 1. Si8241/44 Single-Input High-Side/Low-Side Isolated Drivers 4 VDDI UVLO DT CONTROL & OVERLAP PROTECTION VDDI UVLO Si8241/44 Rev. 0.2 VDDA VOA GNDA VDDB VOB GNDB ...

Page 5

... Current per channel IDDI PWM freq = 500 kHz IDDO PWM freq = 500 kHz IPWM VIH VIL HYST IOA, IOB = –1 mA VOBH IOA, IOB = 1 mA Si8241, Figure 2 Si8244, Figure 2 Si8241, Figure 3 Si8244, Figure 3 Si8241 ON(SINK) Si8244 Si8241 Si8244 Rev. 0.2 Si824x Min Typ Max Units 4 ...

Page 6

... HYS UVLO voltage = 10 V HYS , PLH PWD DT See Figures 36 and (Si8241 (Si8244 Time from VDD_ = VDD_UV+ t START to VOA, VOB = VIA, VIB CMTI VIA, VIB, PWM = VDDI Rev. 0.2 Min Typ Max Units 3.60 4.0 4 ...

Page 7

Test Circuits Figures 2 and 3 depict sink current and source current test circuits. INPUT Measure 50 ns VDDI GND 200 ns INPUT WAVEFORM INPUT Measure 50 ns VDDI GND 200 ns INPUT WAVEFORM Figure 3. Source Current Test ...

Page 8

Si824x Table 2. Absolute Maximum Ratings Parameter 2 Storage Temperature Ambient Temperature under Bias Input-side Supply Voltage Driver-side Supply Voltage Voltage on any Pin with respect to Ground Output Drive Current per Channel Lead Solder Temperature (10 sec) 3 Latchup ...

Page 9

Table 4. Insulation and Safety-Related Specifications Parameter Nominal Air Gap 1 (Clearance) Nominal External Tracking (Creepage) Minimum Internal Gap (Internal Clearance) Tracking Resistance (Proof Tracking Index) Erosion Depth Resistance 2 (Input-Output) Capacitance 2 (Input-Output) 3 Input Capacitance Notes: 1. The ...

Page 10

Si824x Table 6. IEC 60747-5-2 Insulation Characteristics* Parameter Maximum Working Insulation Voltage Input to Output Test Voltage Transient Overvoltage Pollution Degree (DIN VDE 0110, Table 1) Insulation Resistance 500 V IO *Note: Maintenance of ...

Page 11

Table 8. Thermal Characteristics Parameter IC Junction-to-Air Thermal Resistance Figure 4. NB SOIC-16, Thermal Derating Curve, Dependence of Safety Limiting Values with Case Symbol  JA VDDI = 5.5 V VDDA, VDDB ...

Page 12

Si824x 3. Functional Description The operation of an Si824x channel is analogous to that of an opto coupler and gate driver, except an RF carrier is modulated instead of light. This simple architecture provides a robust isolated data path and ...

Page 13

Typical Performance Characteristics (0.5 Amp) The typical performance characteristics depicted in Figures 7 through 18 are for information purposes only. Refer to Table 1 on page 5 for actual specification limits Tfall VDD=12V, 25°C ...

Page 14

Si824x L VDD=12V, 25°C 10 0.0 0.5 1.0 Load (nF) Figure 13. Propagation Delay vs. Load VDD=12V, Load = 200pF 10 -40 - ...

Page 15

Typical Performance Characteristics (4.0 Amp) The typical performance characteristics depicted in Figures 19 through 30 are for information purposes only. Refer to Table 1 on page 5 for actual specification limits Tfall VDD=12V, 25°C ...

Page 16

Si824x VDD=12V, 25° Load (nF) Figure 25. Propagation Delay vs. Load VDD=12V, Load = 200pF 10 -40 -20 ...

Page 17

... Products Table 9 shows the configuration and functional overview for each product in this family. Part Number Configuration Si8241 High-Side/Low-Side Si8244 High-Side/Low-Side 3.3.2. Device Behavior Table 10 contains truth tables for the Si8241/4 families. Table 10. Si824x Family Truth Table* Si8241/4 (PWM Input High-Side/Low-Side) Truth Table ...

Page 18

Si824x 3.4. Power Supply Connections Isolation requirements mandate individual supplies for VDDI, VDDA, and VDDB. The decoupling caps for these supplies must be placed as close to the VDD and GND pins of the Si824x as possible. The optimum values ...

Page 19

Equation 1 and Equation 2 are graphed in Figure 31 where the points along the load line represent the package dissipation-limited value of CL for the corresponding switching frequency ...

Page 20

Si824x 3.6. Layout Considerations It is most important to minimize ringing in the drive path and noise on the Si824x VDD lines. Care must be taken to minimize parasitic inductance in these paths by locating the Si824x as close to ...

Page 21

Undervoltage Lockout (UVLO) The UVLO circuit unconditionally drives VO low when VDD is below the lockout threshold. Referring to Figures 34 and 35, upon power up, the Si824x is maintained in UVLO until VDD rises above VDD Si824x enters ...

Page 22

Si824x 3.8. Programmable Dead Time and Overlap Protection All high-side/low-side drivers (Si8241/4) include programmable overlap protection to prevent outputs VOA and VOB from being high at the same time. These devices also include programmable dead time, which adds a user- ...

Page 23

Applications The following examples illustrate typical circuit configurations using the Si824x. 4.1. Class D Digital Audio Driver Figures 38 and 39 show the Si8241/4 controlled by a single PWM signal. Supply can be unipolar (0 to 1500 V) or ...

Page 24

Si824x 5. Pin Descriptions Table 11. Si8241/44 PWM Input HS/LS Isolated Driver (SOIC-16) Pin Name 1 PWM PWM input connection. 3 VDDI Input-side power supply terminal; connect to a source of 4 GNDI ...

Page 25

... Si8241CB-B-IS1 PWM Si8244BB-C-IS1 PWM Si8244CB-C-IS1 PWM Note: All packages are RoHS-compliant. Moisture sensitivity level is MSL3 for narrow-body SOIC-16 packages with peak reflow temperatures of 260 °C according to the JEDEC industry standard classifications and peak solder temperatures. Tape and reel options are specified by adding an “ ...

Page 26

Si824x 7. Package Outline: 16-Pin Narrow Body SOIC Figure 40 illustrates the package details for the Si824x in a 16-pin narrow-body SOIC (SO-16). Table 13 lists the values for the dimensions shown in the illustration. Figure 40. 16-pin Small Outline ...

Page 27

Land Pattern: 16-Pin Narrow Body SOIC Figure 41 illustrates the recommended land pattern details for the Si824x in a 16-pin narrow-body SOIC. Table 14 lists the values for the dimensions shown in the illustration. Figure 41. 16-Pin Narrow Body ...

Page 28

Si824x 9. Top Marking: 16-Pin Narrow Body SOIC Figure 42. 16-Pin Narrow Body SOIC Top Marking Table 15. 16-Pin Narrow Body SOIC Top Marking Explanations Base Part Number Ordering Options Line 1 Marking: See Ordering Guide for more information. YY ...

Page 29

OCUMENT HANGE IST Revision 0.1 to Revision 0.2  Deleted Table 3.  Added Tables 3 through 8.  Added Figure 4.  Updated common-mode transient immunity specification throughout. Rev. 0.2 Si824x 29 ...

Page 30

Si824x C I ONTACT NFORMATION Silicon Laboratories Inc. 400 West Cesar Chavez Austin, TX 78701 Tel: 1+(512) 416-8500 Fax: 1+(512) 416-9669 Toll Free: 1+(877) 444-3032 Please visit the Silicon Labs Technical Support web page: https://www.silabs.com/support/pages/contacttechnicalsupport.aspx and register to submit a ...

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