si8630 Silicon Laboratories, si8630 Datasheet

Page 1

... Motor control  Power inverters  Communications systems  VDE certification conformity IEC 60747-5-2  (VDE0884 Part 2) EN60950-1  (reinforced insulation) are RMS . RMS Copyright © 2011 by Silicon Laboratories SOLATOR Ordering Information: See page 26. Si8630/31/35 ...

Page 2

... Si8630/31/35 2 Rev. 1.1 ...

Page 3

... Land Pattern: 16-Pin Narrow Body SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 10. Top Marking: 16-Pin Wide Body SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32 10.1. 16-Pin Wide Body SOIC Top Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32 10.2. Top Marking Explanation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 11. Top Marking: 16-Pin Narrow Body SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 11.1. 16-Pin Narrow Body SOIC Top Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 11.2. Top Marking Explanation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34 Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36 Si8630/31/35 Rev. 1.1 Page 3 ...

Page 4

... Si8630/31/35 1. Electrical Specifications Table 1. Recommended Operating Conditions Parameter Ambient Operating Temperature* Supply Voltage *Note: The maximum ambient temperature is dependent on data frequency, output loading, number of operating channels, and supply voltage. Table 2. Electrical Characteristics ( ±10 ±10%, T DD1 DD2 A Parameter Symbol VDD Undervoltage Threshold ...

Page 5

... Si8630Bx, Ex, Si8635Bx V DD1 V DD2 Si8631Bx DD1 V DD2 100 Mbps Supply Current (All inputs = 50 MHz square wave all outputs) Si8630Bx, Ex, Si8635Bx V DD1 V DD2 Si8631Bx DD1 V DD2 Notes: 1. The nominal output impedance of an isolator driver channel is approximately 50 , ±40%, which is a combination of the value of the on-chip series termination resistor and channel resistance of the output driver FET ...

Page 6

... Si8630/31/35 Table 2. Electrical Characteristics (Continued ±10 ±10%, T DD1 DD2 A Parameter Symbol Si863xBx, Ex Maximum Data Rate Minimum Pulse Width t Propagation Delay PHL Pulse Width Distortion | PLH PHL 2 t Propagation Delay Skew Channel-Channel Skew All Models Output Rise Time Output Fall Time ...

Page 7

... ENABLE OUTPUTS t en1 Figure 1. ENABLE Timing Diagram 1.4 V Typical Input t t PLH PHL 90% 90% 1.4 V 10% 10% Typical Output t r Figure 2. Propagation Delay Timing Rev. 1.1 Si8630/31/35 t en2 ...

Page 8

... Si8630/31/35 Table 3. Electrical Characteristics (V = 3.3 V ±10 3.3 V ±10%, T DD1 DD2 Parameter VDD Undervoltage Threshold VDD Undervoltage Threshold VDD Negative-Going Lockout Hysteresis Positive-Going Input Threshold Negative-Going Input Threshold Input Hysteresis High Level Input Voltage Low Level Input Voltage High Level Output Voltage ...

Page 9

... Si8630Bx, Ex, Si8635Bx V DD1 V DD2 Si8631Bx DD1 V DD2 100 Mbps Supply Current (All inputs = 50 MHz square wave all outputs) Si8630Bx, Ex, Si8635Bx V DD1 V DD2 Si8631Bx DD1 V DD2 Notes: 1. The nominal output impedance of an isolator driver channel is approximately 50 , ±40%, which is a combination of the value of the on-chip series termination resistor and channel resistance of the output driver FET ...

Page 10

... Si8630/31/35 Table 3. Electrical Characteristics (Continued 3.3 V ±10 3.3 V ±10%, T DD1 DD2 Parameter Si863xBx, Ex Maximum Data Rate Minimum Pulse Width Propagation Delay Pulse Width Distortion | PLH PHL 2 Propagation Delay Skew Channel-Channel Skew All Models Output Rise Time Output Fall Time Peak Eye Diagram Jitter ...

Page 11

... High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Input Leakage Current 1 Output Impedance Enable Input High Current Enable Input Low Current DC Supply Current (All inputs supply) Si8630Bx, Ex, Si8635Bx V DD1 V DD2 V DD1 V DD2 Si8631Bx, Ex ...

Page 12

... Mbps Supply Current (All inputs = 5 MHz square wave all outputs) Si8630Bx, Ex, Si8635Bx V DD1 V DD2 Si8631Bx DD1 V DD2 100 Mbps Supply Current (All inputs = 50 MHz square wave all outputs) Si8630Bx, Ex, Si8635Bx V DD1 V DD2 Si8631Bx DD1 V DD2 Si863xBx, Ex Maximum Data Rate ...

Page 13

... See Figure 1 en1 t See Figure 1 en2 t SU rated devices which are production tested to 4.5 kV RMS rated devices which are production tested to 6.0 kV RMS Rev. 1.1 Si8630/31/35 Min Typ Max Unit — 2.5 4.0 — 2.5 4.0 — 350 — — kV/µs — ...

Page 14

... Si8630/31/35 Table 6. Insulation and Safety-Related Specifications Parameter 1 Nominal Air Gap (Clearance) Nominal External Tracking 1 (Creepage) Minimum Internal Gap (Internal Clearance) Tracking Resistance (Proof Tracking Index) Erosion Depth 2 Resistance (Input-Output) 2 Capacitance (Input-Output) 3 Input Capacitance Notes: 1. The values in this table correspond to the nominal creepage and clearance values. VDE certifies the clearance and creepage limits as 4 ...

Page 15

... Partial Discharge < sec IOTM Test Condition  = 100 °C/W (WB SOIC-16), JA 105 °C/W (NB SOIC-16 5 150 ° ° Rev. 1.1 Si8630/31/35 Characteristic Unit WB NB SOIC-16 SOIC-16 1200 630 Vpeak 2250 1182 6000 6000 Vpeak >10 >10 Max ...

Page 16

... Si8630/31/35 Table 10. Thermal Characteristics Parameter IC Junction-to-Air Thermal Resistance 500 400 300 200 100 0 Figure 3. (WB SOIC-16) Thermal Derating Curve, Dependence of Safety Limiting Values with Case Temperature per DIN EN 60747-5-2 500 400 300 200 100 0 Figure 4. (NB SOIC-16) Thermal Derating Curve, Dependence of Safety Limiting Values ...

Page 17

... VDE certifies storage temperature from –40 to 150 °C. 1 Symbol Min T –65 STG T – –0.5 DD1 DD2 V –0 –0 — O — — — Rev. 1.1 Si8630/31/35 Typ Max Unit — °C 150 — °C 125 — V 7.0 — 0 — 0 — — 260 ° ...

Page 18

... Si8630/31/35 2. Functional Description 2.1. Theory of Operation The operation of an Si863x channel is analogous to that of an opto coupler, except an RF carrier is modulated instead of light. This simple architecture provides a robust isolated data path and requires no special considerations or initialization at start-up. A simplified block diagram for a single Si863x channel is shown in Figure 5 ...

Page 19

... Eye Diagram Figure 7 illustrates an eye-diagram taken on an Si8630. For the data source, the test used an Anritsu (MP1763C) Pulse Pattern Generator set to 1000 ns/div. The output of the generator's clock and data from an Si8630 were captured on an oscilloscope. The results illustrate that data integrity was maintained even at the high data rate of 150 Mbps ...

Page 20

... It is recommended that the enable inputs be connected to an external logic high or low level when the Si86xx is operating in noisy environments Connect (NC) replaces EN1 on Si8630/35. No Connect replaces EN2 on the Si8635. No Connects are not internally connected and can be left floating, tied to VDD, or tied to GND. ...

Page 21

... EN1, EN2 are unused recommended they be connected to an external logic level, especially if the Si86xx is operating in a noisy environment not applicable Logic High Logic Low. 3. When using the enable pin (EN) function, the output pin state is driven into a high-impedance state when the EN pin is disabled (EN = 0). 1 Table 13. Enable Input Truth Operation Rev. 1.1 Si8630/31/ ...

Page 22

... Si8630/31/35 3.1. Device Startup Outputs are held low during powerup until VDD is above the UVLO threshold for time period tSTART. Following this, the outputs follow the states of inputs. 3.2. Undervoltage Lockout Undervoltage Lockout (UVLO) is provided to prevent erroneous operation during device startup and shutdown or when VDD is below its specified operating circuits range ...

Page 23

... GND2. The supply is unpowered) can either be a logic high or logic low when the output supply is powered. See Table 12 on page 20 and "5. Ordering Guide" on page 26 for more information. Rev. 1.1 Si8630/31/35 FET. When driving loads where 23 ...

Page 24

... Temperature (Degrees C) Figure 11. Propagation Delay vs. Temperature 24 30.0 25.0 20.0 15.0 5V 3.3V 10.0 2.5V 5.0 0 Figure 12. Si8630/35 Typical V Supply DD1 Current vs. Data Rate 5, 3.3, and 2.5 V Operation (15 pF Load) 30.0 25.0 20.0 15.0 5V 3.3V 10.0 2.5V 5.0 0 Supply Current Figure 13. Si8631 Typical V vs. Data Rate 5, 3.3, and 2.5 V Operation Rev. 1 ...

Page 25

... Digital Input Side 1 digital input. Digital Input Side 1 digital input. Digital I/O Side 1 digital input or output Connect. Digital Input Side 1 active high enable Si8630/35 Ground Side 1 ground. Ground Side 2 ground. Digital Input Side 2 active high enable Si8635 Connect. ...

Page 26

... Si8631BD-B-IS 2 Si8631ED-B-IS 2 Si8635BD-B-IS 3 Si8630BC-B-IS1 3 Si8630EC-B-IS1 3 Si8631BC-B-IS1 2 Si8631EC-B-IS1 2 Si8635BC-B-IS1 3 2,3 Revision A Devices Si8630BD-A-IS 3 Si8630ED-A-IS 3 Si8631BD-A-IS 2 Si8631ED-A-IS 2 Si8635BD-A-IS 3 Si8630BC-A-IS1 3 Si8630EC-A-IS1 3 Si8631BC-A-IS1 2 Si8631EC-A-IS1 2 Si8635BC-A-IS1 3 Notes: 1. All packages are RoHS-compliant. Moisture sensitivity level is MSL3 for wide-body SOIC-16 and narrow-body SOIC-16 packages with peak reflow temperatures of 260 ° ...

Page 27

... Figure 14 illustrates the package details for the Triple-Channel Digital Isolator. Table 15 lists the values for the dimensions shown in the illustration. Table 15. Package Diagram Dimensions Symbol Figure 14. 16-Pin Wide Body SOIC Millimeters Min A — A1 0.1 D 10.3 BSC E 10.3 BSC E1 7.5 BSC b 0.31 c 0.20 e 1.27 BSC h 0.25 L 0.4  0° Rev. 1.1 Si8630/31/35 Max 2.65 0.3 0.51 0.33 0.75 1.27 7° 27 ...

Page 28

... Si8630/31/35 7. Land Pattern: 16-Pin Wide-Body SOIC Figure 15 illustrates the recommended land pattern details for the Si863x in a 16-pin wide-body SOIC. Table 16 lists the values for the dimensions shown in the illustration. Table 16. 16-Pin Wide Body SOIC Land Pattern Dimensions Dimension Notes: 1 ...

Page 29

... Figure 16 illustrates the package details for the Si863x in a 16-pin narrow-body SOIC (SO-16). Table 17 lists the values for the dimensions shown in the illustration. Figure 16. 16-pin Small Outline Integrated Circuit (SOIC) Package Table 17. Package Diagram Dimensions Dimension Si8630/31/35 Min Max — 1.75 0.10 0.25 1.25 — 0.31 0.51 0.17 0.25 9.90 BSC 6.00 BSC 3.90 BSC 1 ...

Page 30

... Si8630/31/35 Table 17. Package Diagram Dimensions (Continued) Dimension h θ aaa bbb ccc ddd Notes: 1. All dimensions shown are in millimeters (mm) unless otherwise noted. 2. Dimensioning and Tolerancing per ANSI Y14.5M-1994. 3. This drawing conforms to the JEDEC Solid State Outline MS-012, Variation AC. 4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components ...

Page 31

... Notes: 1. This Land Pattern Design is based on IPC-7351 pattern SOIC127P600X165-16N for Density Level B (Median Land Protrusion). 2. All feature sizes shown are at Maximum Material Condition (MMC) and a card fabrication tolerance of 0. assumed. Si8630/31/35 Feature Pad Column Spacing Pad Row Pitch Pad Width Pad Length Rev ...

Page 32

... Si8630/31/35 10. Top Marking: 16-Pin Wide Body SOIC 10.1. 16-Pin Wide Body SOIC Top Marking 10.2. Top Marking Explanation Base Part Number Ordering Options Line 1 Marking: (See Ordering Guide for more information Year WW = Workweek Line 2 Marking: TTTTTT = Mfg Code Circle = 1.5 mm Diameter (Center-Justified) Line 3 Marking: ...

Page 33

... Mbps (default output = high 150 Mbps (default output = high Insulation rating kV 2.5 kV 3.75 kV “e3” Pb-Free Symbol Assigned by the Assembly House. Corresponds to the year and work week of the mold date. Manufacturing Code from Assembly Purchase Order form. “e3” Pb-Free Symbol. Rev. 1.1 Si8630/31/35 33 ...

Page 34

... Si8630/31/ OCUMENT HANGE IST Revision 0.1 to Revision 0.2  Added chip graphics on page 1.  Moved Tables 1 and 11 to page 17.  Updated Table 6, “Insulation and Safety-Related Specifications,” on page 14.  Updated Table 8, “IEC 60747-5-2 Insulation Characteristics for Si86xxxx*,” on page 15.  Moved Table 12 to page 20. ...

Page 35

... N : OTES Si8630/31/35 Rev. 1.1 35 ...

Page 36

... Si8630/31/ ONTACT NFORMATION Silicon Laboratories Inc. 400 West Cesar Chavez Austin, TX 78701 Tel: 1+(512) 416-8500 Fax: 1+(512) 416-9669 Toll Free: 1+(877) 444-3032 Please visit the Silicon Labs Technical Support web page: https://www.silabs.com/support/pages/contacttechnicalsupport.aspx and register to submit a technical support request. The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. ...