tc58nvg0s3eta00 TOSHIBA Semiconductor CORPORATION, tc58nvg0s3eta00 Datasheet

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tc58nvg0s3eta00

Manufacturer Part Number
tc58nvg0s3eta00
Description
1 Gbit 128m ? 8 Bit Cmos Nand E2prom
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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TENTATIVE
1 GBIT (128M × 8 BIT) CMOS NAND E
DESCRIPTION
Read-Only Memory (NAND E
The device has two 2112-byte static registers which allow program and read data to be transferred between the
register and the memory cell array in 2112-byte increments. The Erase operation is implemented in a single block
unit (128 Kbytes + 4 Kbytes: 2112 bytes × 64 pages).
input/output as well as for command inputs. The Erase and Program operations are automatically executed making
the device most suitable for applications such as solid-state file storage, voice recording, image file memory for still
cameras and other systems which require high-density non-volatile memory data storage.
FEATURES
The TC58NVG0S3E is a single 3.3V 1 Gbit (1,107,296,256 bits) NAND Electrically Erasable and Programmable
The TC58NVG0S3E is a serial-type memory device which utilizes the I/O pins for both address and data
Organization
Modes
Mode control
Number of valid blocks
Power supply
Access time
Program/Erase time
Operating current
Package
V
Memory cell array
Register
Page size
Block size
Read, Reset, Auto Page Program, Auto Block Erase, Status Read, Page Copy,
Multi Page Program, Multi Block Erase, Multi Page Copy, Multi Page Read
Serial input/output
Command control
Min 1004 blocks
Max 1024 blocks
Cell array to register 30 µs max
Serial Read Cycle
Auto Page Program
Auto Block Erase
Read (25 ns cycle)
Program (avg.)
Erase (avg.)
Standby
TSOP I 48-P-1220-0.50 (Weight: 0.53 g typ.)
CC
= 2.7V to 3.6V
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
x8
2112 × 64K × 8
2112 × 8
2112 bytes
(128K + 4K) bytes
25 ns min (CL=100pF)
300 µs/page typ.
2.5 ms/block typ.
30 mA max.
30 mA max
30 mA max
50 µA max
2
PROM) organized as (2048 + 64) bytes × 64 pages × 1024blocks.
2
PROM
1
TC58NVG0S3ETA00
2010-01-25C

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