tda19977a NXP Semiconductors, tda19977a Datasheet
tda19977a
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tda19977a Summary of contents
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... OBA (as used in SACD), DST and HBR stream support The TDA19977A; TDA19977B converts HDMI streams with or without HDCP (TDA19977A only) into RGB or YCbCr digital signals. The YCbCr digital output signal can be 4:4:4 or 4:2:2 semi-planar format based on the ITU-R BT.601 standard or 4:2:2 based 480i at 60 Hz), 576i (1440 ...
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... ITU-R BT.656 format. The device can adjust the output timing of the video port by altering the values C-bus. 2. Features I Complies with the HDMI 1.3a, DVI 1.0, CEA-861-D and HDCP (TDA19977A only) 1.2 standards I Three independent HDMI inputs the HDMI frequency of 235 MHz I Embedded auto-adaptive equalizer on all HDMI links I ...
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... P power dissipation P power consumption cons [ [ activity on video port output. [3] HDCP decoding is only supported by the TDA19977A. TDA19977A_TDA19977B_1 Product data sheet TDA19977A; TDA19977B Triple input HDMI receiver interface with digital processing I High-end TV I Home theater amplifier I DVD recorder ...
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... Package Name TDA19977AHV HLQFP144 TDA19977BHV HLQFP144 TDA19977A_TDA19977B_1 Product data sheet TDA19977A; TDA19977B Triple input HDMI receiver interface with digital processing Description plastic thermal enhanced low profile quad flat package; 144 leads; body 20 20 1.4 mm; exposed die pad Rev. 01 — 7 August 2008 ...
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... RESISTANCE HDMI C (channel C) CONTROL RRX2 XTALIN/MCLK CRYSTAL OSCILLATOR XTALOUT SYNC TIMING MEASUREMENT 2 I C-BUS SLAVE INTERFACE SDA/SCL (1) only used by TDA19977A. Fig 1. Block diagram of TDA19977A; TDA19977B AUDIO PLL (1) OTP PACKET MEMORY EXTRACTION HDMI COLOR RECEIVER EQUALIZER DEPTH AND UNPACKING HDCP EDID MEMORY ...
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... RXC1 RXC1+ V DDH(3V3) n.c. n.c. TDA19977A_TDA19977B_1 Product data sheet TDA19977A; TDA19977B Triple input HDMI receiver interface with digital processing 1 TDA19977 36 Pin configuration for TDA19977A; TDA19977B Pin description [1] Pin Type Description 1 G ground for the digital core 2 I power-down control input (active HIGH HDMI receiver supply voltage ...
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... VP[7] VP[8] VP[9] VP[10] VP[11] V DDO(3V3) VP[12] V SSO VP[13] VP[14] VP[15] VP[16] VP[17] VP[18] VP[19] TDA19977A_TDA19977B_1 Product data sheet TDA19977A; TDA19977B Triple input HDMI receiver interface with digital processing Pin description …continued [1] Pin Type Description 24 G HDMI receiver ground 25 I HDMI input C negative data channel HDMI input C positive data channel OTP memory programming voltage ...
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... SSH V DDH(1V8) V SSH V DDC(1V8) XTALOUT XTALIN/MCLK V DDI(3V3) VAI SDA TDA19977A_TDA19977B_1 Product data sheet TDA19977A; TDA19977B Triple input HDMI receiver interface with digital processing Pin description …continued [1] Pin Type Description 62 O video port output bit video port output supply voltage; 3 digital core supply voltage ...
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... RXA1+ V DDH(3V3) RXB2+ RXB2 V SSH RXA2 RXA2+ V SSH V DDC(1V8) V DDC(1V8) HSDAC TDA19977A_TDA19977B_1 Product data sheet TDA19977A; TDA19977B Triple input HDMI receiver interface with digital processing Pin description …continued [1] Pin Type Description C-bus serial clock input 99 I/O HDMI input/output A (HDCP 100 I ...
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... NXP Semiconductors’ Nexperia devices for HDTV. Data streams can be decoded with or without HDCP (TDA19977A only) protection. Outputs from the TDA19977A; TDA19977B can be RGB 4:4:4, YCbCr 4:4:4, YCbCr 4:2:2 semi-planar format based on the ITU-R BT.601 standard or YCbCr 4:2:2 based on the ITU-R BT.656 format. Inputs can be both progressive and interlaced formats. The TDA19977A ...
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... TDA19977A. 8.7 Color depth unpacking In Deep Color mode, the TDA19977A; TDA19977B receives several fragments of a pixel group at the HDMI link frequency. This block translates the received pixel group into pixels at the pixel frequency. This operation is fully automatic and does not need any external control ...
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... The TDA19977A; TDA19977B can receive the new HDMI 1.3a packets, general control and color gamut metadata information packets. In audio applications, the TDA19977A; TDA19977B manages HBR packets for high bit rate compressed audio streams (IEC 61937), OBA samples and DST packets for OBA and SACD with DSD and DST audio streams. The TDA19977A ...
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... Audio port AP5 AP4 AP3 AP2 AP1 AP0 ACLK [1] Can be activated with the I TDA19977A_TDA19977B_1 Product data sheet TDA19977A; TDA19977B Triple input HDMI receiver interface with digital processing Audio port configuration (Layout 0) Pin Layout S-bus [1] 85 SYSCLK 83 WS (word select) ...
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... The TDA19977A; TDA19977B includes an improved system for accurate recognition of PC and TV formats. This system measures the parameters of blanking and video active area. This function can be useful for example when the TDA19977A; TDA19977B receives PC format data in HDMI or DVI modes. 8.15 Color space conversion ...
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... C-bus serial interface enables the internal registers of the device to be programmed. The slave address of the device is selected by pin A0. TDA19977A_TDA19977B_1 Product data sheet TDA19977A; TDA19977B Triple input HDMI receiver interface with digital processing 2) 2 C-bus can replace the data stream during the ...
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... TDA19977A; TDA19977B. The embedded EDID memory remains accessible on each HDMI input when the TDA19977A; TDA19977B uses a different low-power mode. The “physical address” of each HDMI input can be easily changed with the TDA19977A; TDA19977B without corrupting the integrity of each DDC-bus. 8.25.1 EDID memory shared over all three HDMI inputs (1) 253 bytes Fig 3 ...
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... NXP Semiconductors 8.25.2 EDID memory shared over two HDMI inputs (1) 253 bytes Fig C-bus protocol The TDA19977A; TDA19977B is a slave I pin. The timing and protocol for I Bit A0 of the C-bus address is given in Table 10. Limiting values Table 8. In accordance with the Absolute Maximum Rating System (IEC 60134). ...
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... I HDMI supply current (1.8 V) DDH(1V8) I input supply current (3.3 V) DDI(3V3) I output supply current (3.3 V) DDO(3V3) TDA19977A_TDA19977B_1 Product data sheet TDA19977A; TDA19977B Triple input HDMI receiver interface with digital processing Limiting values …continued Parameter Conditions ambient temperature junction temperature electrostatic discharge HBM voltage Thermal characteristics ...
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... Timing output: pins AP[5:0] with respect to ACLK data output set-up time su(Q) t data output hold time h(Q) TDA19977A_TDA19977B_1 Product data sheet TDA19977A; TDA19977B Triple input HDMI receiver interface with digital processing = 25 C; unless otherwise specified. amb Conditions 720p 1080p 1080p at 60 Hz; Deep Color mode 12-bit ...
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... activity on video port output. [2] HDCP decoding is only supported by TDA19977A. [3] In high-impedance state, the output buffer is set to repeater mode recopying the input logic state with a small current. The output current changes from most negative to the most positive value at the triggering level which is internally set to V ...
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... NXP Semiconductors Fig 5. Fig 6. TDA19977A_TDA19977B_1 Product data sheet TDA19977A; TDA19977B Triple input HDMI receiver interface with digital processing VCLK VP[29:0] Output timing diagram pin VCLK on pins VP[29:0] ACLK AP[5:0] Output timing diagram pin ACLK on pins AP[5:0] Rev. 01 — 7 August 2008 su(Q) 2 h(Q) 001aah368 su(Q) 2 ...
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... VP[19 VP[18 VP[17] Cb[11] Cr[11] VP[16] Cb[10] Cr[10] VP[15] Cb[9] Cr[9] VP[14] Cb[8] Cr[8] VP[13] Cb[7] Cr[7] VP[12] Cb[6] Cr[6] VP[11] Cb[5] Cr[5] VP[10] Cb[4] Cr[4] VP[9] Cb[3] Cr[3] VP[8] Cb[2] Cr[2] VP[7] Cb[1] Cr[1] VP[6] Cb[0] Cr[0] VP[5] Z/L Z/L VP[4] Z/L Z/L VP[3] Z/L Z/L VP[2] Z/L Z/L VP[1] Z/L Z/L VP[0] Z/L Z/L [ high-impedance LOW-level; depending on bit VPL. TDA19977A_TDA19977B_1 Product data sheet TDA19977A; TDA19977B Triple input HDMI receiver interface with digital processing [1] YCbCr 4:2:2 ITU-R BT.656 [11] Z/L [10] Z/L [9] Z/L [8] Z/L [7] Z/L [6] Z/L [5] Z/L [4] Z/L [3] Z/L [2] Z/L [1] Z/L [0] Z/L Cb[11] Cb[10] Cb[9] Cb[8] Cb[7] Cb[6] Cb[5] Cb[4] Cb[3] Cb[2] Cb[1] Cb[0] Z/L Z/L Z/L Z/L Z/L Z/L Rev. 01 — 7 August 2008 [1] Z/L Z/L Z/L Z/L Z/L Z/L Z/L Z/L Z/L Z/L Z/L Z/L Z/L Z/L Z/L Z/L Z/L Z/L Z/L Z/L Z/L Z/L Z/L Z/L Y [11] ...
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... VP[7] Y [ VP[6] Y [ VP[5] Z/L Z/L VP[4] Z/L Z/L VP[3] Z/L Z/L VP[2] Z/L Z/L VP[1] Z/L Z/L VP[0] Z/L Z/L [ high-impedance LOW-level; depending on bit VPL. TDA19977A_TDA19977B_1 Product data sheet TDA19977A; TDA19977B Triple input HDMI receiver interface with digital processing [1] YCbCr 4:2:2 ITU-R BT.656 Cb[11] Y [11] 0 Cb[10] Y [10] 0 Cb[9] Y [9] 0 Cb[8] Y [8] 0 Cb[7] Y [7] 0 Cb[6] Y [6] 0 Cb[5] Y [5] 0 Cb[4] Y [4] 0 Cb[3] ...
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... Cr[4] VP[11] R[3] Cr[3] VP[10] R[2] Cr[2] VP[9] B[11] Cb[11] VP[8] B[10] Cb[10] VP[7] B[9] Cb[9] VP[6] B[8] Cb[8] VP[5] B[7] Cb[7] VP[4] B[6] Cb[6] VP[3] B[5] Cb[5] VP[2] B[4] Cb[4] VP[1] B[3] Cb[3] VP[0] B[2] Cb[2] [ high-impedance LOW-level; depending on bit VPL. TDA19977A_TDA19977B_1 Product data sheet TDA19977A; TDA19977B Triple input HDMI receiver interface with digital processing [1] YCbCr 4:2:2 semi-planar YCbCr 4:2:2 ITU-R BT.656 Y [11] Y [11] Z [10] Y [10] Z [9] Y [9] Z [8] Y [8] Z [7] Y [7] Z [6] ...
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... VP[18] G[10] Y[10] VP[17] G[9] Y[9] VP[16] G[8] Y[8] VP[15] G[7] Y[7] VP[14] G[6] Y[6] VP[13] G[5] Y[5] VP[12] G[4] Y[4] VP[11] G[3] Y[3] VP[10] G[2] Y[2] VP[9] R[11] Cr[11] VP[8] R[10] Cr[10] VP[7] R[9] Cr[9] VP[6] R[8] Cr[8] VP[5] R[7] Cr[7] VP[4] R[6] Cr[6] VP[3] R[5] Cr[5] VP[2] R[4] Cr[4] VP[1] R[3] Cr[3] VP[0] R[2] Cr[2] [ high-impedance LOW-level; depending on bit VPL. TDA19977A_TDA19977B_1 Product data sheet TDA19977A; TDA19977B Triple input HDMI receiver interface with digital processing [1] YCbCr 4:2:2 semi-planar Z/L Z/L Z/L Z/L Z/L Z/L Z/L Z/L Z/L Z/L Z/L Z/L Z/L Z/L Z/L Z/L Z/L Z/L Z/L Z/L Y [11] Y [11 [10] Y [10 [ [ [ [ [5] ...
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... Cb[10] VP[11] B[9] Cb[9] VP[10] B[8] Cb[8] VP[9] B[7] Cb[7] VP[8] B[6] Cb[6] VP[7] B[5] Cb[5] VP[6] B[4] Cb[4] VP[5] Z/L Z/L VP[4] Z/L Z/L VP[3] Z/L Z/L VP[2] Z/L Z/L VP[1] Z/L Z/L VP[0] Z/L Z/L [ high-impedance LOW-level; depending on bit VPL. TDA19977A_TDA19977B_1 Product data sheet TDA19977A; TDA19977B Triple input HDMI receiver interface with digital processing [1] [1] YCbCr 4:2:2 semi-planar Y [11] Y [11 [10] Y [10 [ [ [ [ ...
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... G[7] Y[7] VP[16] G[6] Y[6] VP[15] G[5] Y[5] VP[14] G[4] Y[4] VP[13] R[11] Cr[11] VP[12] R[10] Cr[10] VP[11] R[9] Cr[9] VP[10] R[8] Cr[8] VP[9] R[7] Cr[7] VP[8] R[6] Cr[6] VP[7] R[5] Cr[5] VP[6] R[4] Cr[4] VP[5] Z/L Z/L VP[4] Z/L Z/L VP[3] Z/L Z/L VP[2] Z/L Z/L VP[1] Z/L Z/L VP[0] Z/L Z/L [ high-impedance LOW-level; depending on bit VPL. TDA19977A_TDA19977B_1 Product data sheet TDA19977A; TDA19977B Triple input HDMI receiver interface with digital processing [1] [1] YCbCr 4:2:2 semi-planar Z/L Z/L Z/L Z/L Z/L Z/L Z/L Z/L Z/L Z/L Z/L Z/L Z/L Z/L Z/L Z/L Y [11] Y [11 [10] Y [10 [ [ [ [ ...
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... VGA 0.48M3 SVGA 0.48M3-R 0.41M9 0.79M3 XGA 0.79M3-R XGA 1.00M3 0.98M9-R 0.98M9 TDA19977A_TDA19977B_1 Product data sheet TDA19977A; TDA19977B Triple input HDMI receiver interface with digital processing Example of supported video formats Format 1440 576i 50 Hz 1440 480i 59.94 Hz 1440 480i 60 Hz 720 ...
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... Also referred to as NTSC (National Television Standards Committee). [5] Only supports Deep Color mode 10-bit. [6] Sometimes also referred to as WUXGA (Wide Ultra eXtended Graphics Array). TDA19977A_TDA19977B_1 Product data sheet TDA19977A; TDA19977B Triple input HDMI receiver interface with digital processing Example of supported video formats Format 1280 800p 60 Hz 1280 ...
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... CS/FREF 32 VS/VREF 33 HS/HREF VP[0] 36 Fig 7. Application diagram of TDA19977A; TDA19977B TDA19977A_TDA19977B_1 Product data sheet TDA19977A; TDA19977B Triple input HDMI receiver interface with digital processing DDC C HDMI inputs A and B TDA19977 control outputs and video port outputs Rev. 01 — 7 August 2008 V DDH(1V8) 108 ...
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... Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION IEC SOT612-3 Fig 8. Package outline SOT612-3 (HLQFP144) TDA19977A_TDA19977B_1 Product data sheet TDA19977A; TDA19977B Triple input HDMI receiver interface with digital processing ...
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... Solder bath specifications, including temperature and impurities TDA19977A_TDA19977B_1 Product data sheet TDA19977A; TDA19977B Triple input HDMI receiver interface with digital processing Rev. 01 — 7 August 2008 © NXP B.V. 2008. All rights reserved ...
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... Moisture sensitivity precautions, as indicated on the packing, must be respected at all times. Studies have shown that small packages reach higher temperatures during reflow soldering, see TDA19977A_TDA19977B_1 Product data sheet TDA19977A; TDA19977B Triple input HDMI receiver interface with digital processing and 19 SnPb eutectic process (from J-STD-020C) Package reflow temperature ( C) ...
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... Fig 9. For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description” . TDA19977A_TDA19977B_1 Product data sheet TDA19977A; TDA19977B Triple input HDMI receiver interface with digital processing maximum peak temperature = MSL limit, damage level temperature minimum peak temperature ...
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... UXGA VGA WUXGA XGA YCbCr 19. Revision history Table 21. Revision history Document ID Release date TDA19977A_TDA19977B_1 20080807 TDA19977A_TDA19977B_1 Product data sheet TDA19977A; TDA19977B Triple input HDMI receiver interface with digital processing Abbreviations Description Audio Clock Regeneration Audio Video Receiver American Wire Gauge Digital-to-Analog Converter ...
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... Contact information For more information, please visit: For sales office addresses, please send an email to: TDA19977A_TDA19977B_1 Product data sheet TDA19977A; TDA19977B Triple input HDMI receiver interface with digital processing [3] Definition This document contains data from the objective specification for product development. ...
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... NXP Semiconductors TDA19977A_TDA19977B_1 Product data sheet TDA19977A; TDA19977B Triple input HDMI receiver interface with digital processing Notes Rev. 01 — 7 August 2008 © NXP B.V. 2008. All rights reserved ...
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... Table 18. SnPb eutectic process (from J-STD-020C .33 Table 19. Lead-free process (from J-STD-020C .33 Table 20. Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . .35 Table 21. Revision history . . . . . . . . . . . . . . . . . . . . . . . .35 TDA19977A_TDA19977B_1 Product data sheet TDA19977A; TDA19977B Triple input HDMI receiver interface with digital processing Rev. 01 — 7 August 2008 © NXP B.V. 2008. All rights reserved ...
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... NXP Semiconductors 24. Figures Fig 1. Block diagram of TDA19977A; TDA19977B . . . . .5 Fig 2. Pin configuration for TDA19977A; TDA19977B . . .6 Fig 3. An example of an application with EDID memory shared over all three HDMI inputs . . . . . . . . . . . .16 Fig 4. An example of an application with EDID memory shared over two HDMI inputs .17 Fig 5 ...
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... Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 7.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 6 8 Functional description . . . . . . . . . . . . . . . . . . 10 8.1 Software drivers . . . . . . . . . . . . . . . . . . . . . . . 10 8.2 HDMI inputs . . . . . . . . . . . . . . . . . . . . . . . . . . 10 8.3 Termination resistance control . . . . . . . . . . . . 10 8.4 Equalizer 8.5 Activity detection 8.6 High-bandwidth digital content protection (TDA19977A only 8.7 Color depth unpacking . . . . . . . . . . . . . . . . . . 11 8.8 Derepeater . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 8.9 Upsample . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 8.10 Packet extraction 8.11 Audio PLL . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 8.12 Audio formatter . . . . . . . . . . . . . . . . . . . . . . . . 12 8.13 Sync timing measurement . . . . . . . . . . . . . . . 14 8.14 Format measurement timing 8.15 Color space conversion . . . . . . . . . . . . . . . . . 14 8.16 4:2:2 downsampling fi ...