TDA7429 STMicroelectronics, TDA7429 Datasheet
TDA7429
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TDA7429 Summary of contents
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... IN 1dB STEPS FOR BALANCE FACILITY – INDEPENDENT MUTE FUNCTION ALL FUNCTIONS PROGRAMMABLE VIA SERIAL BUS 2 DESCRIPTION The TDA7429 is volume tone (bass middle and tre- ble) balance (Left/Right) processors for quality audio applications in TV and Hi-Fi systems. Figure 2. Pin Connection (TQFP44) REAROUT June 2004 WITH SURROUND SOUND MATRIX Figure 1 ...
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... TDA7429 Figure 3. PIN CONNECTION (SDIP42) Table 2. Absolute Maximum Ratings Symbol V Operating Supply Voltage S T Operating Ambient Temperature amb T Storage Temperature Range stg Table 3. Quick Reference Data Symbol V Supply Voltage S V Max Input Signal Handling CL THD Total Harmonic Distortion V = 0.1Vrms f = 1KHz S/N Signal to Noise Ratio V ...
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... Figure 4. TEST CIRCUIT (TDA7429S) 2.2 F BASSO_R VAR_R 22nF 14 PS4 1 22nF PS3 2 4.7nF PS2 3 100nF PS1 4 1.2nF LP 5 5.6nF LP1 6 5.6nF TREBLE_R 23 5.6nF TREBLE_L 24 100nF MONITOR_R 37 22nF MIDDLE_LO 19 18nF 20 MIDDLE_LI 2.7K 22nF 21 MIDDLE_RO 18nF 22 MIDDLE_RI 32 2.7K AUXOUT_L AUXOUT_R L_OUT D97AU626 Figure 5. TEST CIRCUIT (TDA7429T) 2.2 F BASSO-R ...
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... TDA7429 Figure 6. Block Diagram (TDA7429T) MIDDLE-LO MIDDLE-LI 4/22 BASS-RO BASS-RI MIDDLE-RO MIDDLE-RI REARIN REAROUT CREF AGND ...
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... Figure 7. Block Diagram (TDA7429S) MIDDLE_LO MIDDLE_LI TDA7429 BASS_RO BASS_RI MIDDLE_RO MIDDLE_RI REARIN REAROUT CREF AGND 5/22 ...
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... TDA7429 Table 5. Electrical Characteristcs (refer to the test circuit 600 , all controls flat (G = 0dB), L+R CTRL = +4dB, MODE = OFF 1KHz unless otherwise specified). Symbol Parameter SUPPLY V Supply Voltage S I Supply Current S SVR Ripple Rejection INPUT STAGE R Input Resistance IN V Clipping Level CL C Control Range ...
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... Input signal of 1kHz, 1 and out Simulated Mode, Effect Ctrl = -6dB Input signal of 3.6kHz, 1 and out Simulated Mode, Effect Ctrl = -6dB Input signal of 250Hz, 1 and out TDA7429 Min. Typ. Max. Unit 4.8 6.8 8 8.4 10.9 K 12.9 18.3 23.7 K 8.5 12.1 15.6 K 10.2 14.5 18.7 K 12.7 18.1 23 ...
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... TDA7429 Symbol Parameter R Simulated R Output 2 MON2 R Simulated R Output 3 MON3 R Low Pass Filter Resistance LP1 R High Pass Filter Resistance HPI R LP Pin Impedance LPF SPEAKER & AUX ATTENUATORS C Control Range RANGE S Step Resolution STEP E Attenuation set error Steps DC A Output Mute Condition ...
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... I C BUS INTERFACE Data transmission from microprocessor to the TDA7429 and viceversa takes place through the 2 wires I interface, consisting of the two lines SDA and SCL (pull-up resistors to positive supply voltage must be connect- ed). 3.1 Data Validity As shown in fig. 8, the data on the SDA line must be stable during the high period of the clock. The HIGH and LOW state of the data line can only change when the clock signal on the SCL line is LOW ...
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... SDA START Figure 10. Acknowledge on the I SCL SDA MSB START 4 SOFTWARE SPECIFICATION 4.1 Interface Protocol The interface protocol comprises: A start condition (S) A chip address byte, containing the TDA7429 address A subaddress bytes A sequence of data (N byte + achnowledge) A stop condition (P) Figure 11. CHIP ADDRESS MSB LSB ...
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... EXAMPLES 5.1 No Incremental Bus The TDA7429 receives a start condition, the correct chip address, a subaddress with the MSB = 0 (no incre- mental bus), N-datas (all these datas concern the subaddress selected), a stop condition. Figure 12. CHIP ADDRESS MSB LSB D95AU306 5.2 Incremental Bus ...
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... TDA7429 Table 7. INPUT ATTENUATION SELECTION MSB INPUT ATTENUATION = 0 ~ -31.5dB Table 12/ ...
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... TDA7429 LSB D0 SURROUND MODE 0 SIMULATED 1 MUSIC 0 OFF 1 MOVIE OUT VAR FIX EFFECT CONTROL - -10 -11 -12 -13 -14 -15 -16 -17 -18 -19 -20 -21 SURROUND PHASE LSB ...
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... TDA7429 Table 11. BASS SELECTION MSB Table 12. SPEAKER/AUX ATT. R & L SELECTION MSB ...
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... TDA7429 LSB MIDDLE STEPS ...
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... TDA7429 Table 14. INPUT/RECOUT L & R SELECTION MSB Table 15. BASS & MIDDLE TREBLE SURROUND & OUT CONTROL+ EFFECT CONTROL SPEAKER/AUX ATTENUATION L &R INPUT ATTENUATION + REAR SWITCH NATURAL BASE INPUT Figure 14. PIN: VOUT REF ...
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... GND Vref Figure 19. PIN: L-IN, R-IN, L-IN2, R-IN2, L-IN3, 10K 60K Figure 20. PIN: LP1 20 A 5.5K Figure 21. PIN: CREF 20 A D95AU227 R-IN3, L-IN4, R-IN4 50K GND V D94AU200 REF V S 10K GND HP1 D94AU211 V S 20K 42K 20K D95AU336 GND TDA7429 17/22 ...
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... TDA7429 Figure 22. PIN: SCL, SDA GND D94AU205 Figure 23. PIN: PS1, PS2, PS3, PS4 GND Figure 24. PIN: REARIN 50K GND Vref 18/22 Figure 25. PIN: L-OUT, R-OUT, MONITOR- Figure 26. PIN: BASS-LI, BASS-RI, MIDDLE-LI BASS-LO BASS-RO,MIDDLE-LO,MIDDLE-RO D95AU308 Figure 27. PIN: BASS-LO, BASS-RO, MIDDLE- ...
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... TQFP4410 OUTLINE AND MECHANICAL DATA TQFP44 ( 1.4mm 0.10mm .004 Seating Plane C K 0076922 D TDA7429 19/22 ...
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... TDA7429 Figure 29. SDIP42 Mechanical Data & Package Dimensions mm DIM. MIN. TYP. MAX. A 5.08 A1 0.51 A2 3.05 3.81 4.57 B 0.38 0.46 0.56 B1 0.89 1.02 1.14 c 0.23 0.25 0.38 D 36.58 36.83 37.08 E 15.24 16.00 E1 12.70 13.72 14.48 e 1.778 e1 15.24 e2 18.54 e3 1.52 L 2.54 3.30 3. 20/22 inch MIN. TYP. MAX. 0.20 0.020 0.120 0.150 0.180 0.0149 0.0181 0.0220 0.035 0.040 0.045 0.0090 0.0098 0.0150 1.440 1.450 1.460 ...
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... Table 16. Revision History Date Revision January 2004 June 2004 5 First Issue in EDOCS DMS 6 Changed the Style-sheet in compliance to the new “Corporate Technical Pubblications Design Guide” Description of Changes TDA7429 21/22 ...
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... TDA7429 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice ...