vsc8115 Vitesse Semiconductor Corp, vsc8115 Datasheet
vsc8115
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vsc8115 Summary of contents
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... The VSC8115 functions as a clock and data recovery unit for SONET/SDH-based equipment to derive high speed timing signals. The VSC8115 recovers the clock from the scrambled NRZ data operating at 622.08Mb/s (STS-12/OC-12/STM-4) or 155.52Mb/s (STS-3/OC-3/STM-1). After the clock is recovered, the data is retimed using an output flip-flop ...
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... Figure 1. If either one of these two inputs goes LOW and BYPASS is LOW, the VSC8115 will enter the loss of signal (LOS) state, and it will hold the DATAOUT+/- output at logic LOW state. During the LOS state, the VSC8115 also will hold the output clock CLKOUT+/- to within +500ppm of the REFCLK ...
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... Target Specification VSC8115 Figure 1: Control Diagram for Signal Detection and PLL Bypass Operation 2 DATAIN+/- PLL Clock (on-chip) REFCLK STS12 BYPASS LOCKREFN SD Table 1: Signal Detection and PLL Bypass Operation Control STS12 BYPASS G52272-0, Rev. 1.1 9/29/00 741 Calle Plano, Camarillo, CA 93012 • ...
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... VITESSE SEMICONDUCTOR CORPORATION Target Specification VSC8115 Units Conditions MHz ppm With respect to the fixed ppm reference frequency 20% Minimum transition density Valid REFCLK and device s already powered up 10% to 90%, with 100 & 5pF ...
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... Figure 2. The VSC8115 obtains and maintains lock based on the data transition information. When there is no transition on the data stream, the recovered clock frequency will be held to within +500ppm of the reference clock. The VSC8115 can maintain lock over 1000 bits of no switch- ing on data stream. ...
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... Page 6 741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896 VITESSE SEMICONDUCTOR CORPORATION ). STS-12 Operation Description (622.08MHz) VITESSE SEMICONDUCTOR CORPORATION Target Specification VSC8115 ) while the data valid time after su STS-3 Operation (155.52MHz) 450 pS 2.0 nS 650 pS 3.0 nS G52272-0, Rev. 1.1 9/29/00 ...
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... Target Specification VSC8115 DC Characteristics Table 4: LVPECL Single-ended Inputs and Outputs Parameters Description V Input HIGH voltage IH V Input LOW voltage IL I Input HIGH current IH I Input LOW current IL V Output LOW voltage OL V Output HIGH voltage OH Table 5: LVPECL Differential Inputs Parameters Description ...
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... Min Typ 1.12 - 400 - Min Typ Max 2.0 — VDD 0 — -50 --- -50 --- Description DD VITESSE SEMICONDUCTOR CORPORATION Target Specification VSC8115 Max Units Conditions 100 PAD to 1.7 V PADN 100 PAD to 750 mV PADN Max Units Conditions 50 to (VDD - 2V) 2 (VDD - 2V) 800 mV Units Conditions — ...
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... Target Specification VSC8115 Absolute Maximum Ratings Power Supply Voltage (V ) Potential to GND.................................................................................-0. Input Voltage (LVPECL Inputs)..................................................................................... -0. Input Voltage (LVTTL Inputs) ....................................................................................... -0. Output Current (LVDS or LVPECL Outputs).......................................................................................... +/-50mA Case Temperature Under Bias.........................................................................................................-55 Storage Temperature .................................................................................................................... -65 Maximum Input ESD (Human Body Model) High Speed Outputs (pins 11, 12, 13, & ...
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... Ground pin for low speed I/O’s and on-chip digital CMOS blocks +3.3V +3.3V Power Supply for high speed I/O’s and on-chip PLL blocks. GND Ground pins for high speed I/O’s and on-chip PLL blocks. VITESSE SEMICONDUCTOR CORPORATION Target Specification VSC8115 Pin Description G52272-0, Rev. 1.1 9/29/00 ...
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... Target Specification VSC8115 Package Information G52272-0, Rev. 1.1 9/29/00 741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896 VITESSE SEMICONDUCTOR CORPORATION TSSOP Package Drawings Key aaa b b1 bbb VITESSE SEMICONDUCTOR CORPORATION STS-12/STS-3 Multi Rate Clock and Data Recovery Unit ...
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... Clock and Data Recovery Unit Package Thermal Characteristics The VSC8115 is packaged in a Thin Shrink Small Outline Package (TSSOP). This package conforms to JEDEC package outline standards. It has hi-conductivity copper lead frames and a very low-stress mold com- pound. The junction to case thermal resistance is 80 single-layer PCB applications ...