W6811IW Nuvoton Technology Corporation of America, W6811IW Datasheet
W6811IW
Specifications of W6811IW
Related parts for W6811IW
W6811IW Summary of contents
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W6811 SINGLE-CHANNEL VOICEBAND CODEC (5V Analog, 3V Digital) Data Sheet Publication Release Date: September, 2005 - 1 - Revision A12 ...
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GENERAL DESCRIPTION The W6811 is a general-purpose single channel PCM CODEC with pin-selectable -Law or A-Law companding. The device is compliant with the ITU G.712 specification. It operates off of separated analog (5V) and digital (3V) power supplies and ...
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BLOCK DIAGRAM BCLKR BCLKR FSR PCMR BCLKT BCLKT BCLKT FST PCMT Pre - Saler Pre - scaler MCLK MCLK 256 kHz, 256 kHz, 512 kHz, 512 kHz, 1536 kHz, 1536 kHz, 1544 kHz, 1544 kHz, 2048 kHz, 2048 kHz, ...
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TABLE OF CONTENTS 1. GENERAL DESCRIPTION ................................................................................................................. 2 2. FEATURES ......................................................................................................................................... 2 3. BLOCK DIAGRAM............................................................................................................................... 3 4. TABLE OF CONTENTS ...................................................................................................................... 4 5. PIN CONFIGURATION ....................................................................................................................... 6 6. PIN DESCRIPTION ............................................................................................................................. 7 7. FUNCTIONAL DESCRIPTION............................................................................................................ 9 7.1. Transmit Path............................................................................................................................. ...
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PIN CONFIGURATION V V REF REF PAI PAI PAO - PAO - PAO+ PAO DDA DDA DDD DDD FSR FSR PCMI PCMR BCLKR BCLKR PUI PUI ...
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PIN DESCRIPTION * Pin Pin V Functionality DD Name No This pin is used to bypass the on-chip 2.5V voltage reference. It needs to be REF decoupled to V external loads should be tied to this ...
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Pin Pin V Functionality DD Name No This is the digital supply ground. This pin should be connected to 0V. SSD NC 18 Not Connected This is the analog supply ground. This pin ...
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FUNCTIONAL DESCRIPTION W6811 is a single-rail, single channel PCM CODEC for voiceband applications. The CODEC complies with the specifications of the ITU-T G.712 recommendation. The CODEC also includes a complete μ- Law and A-Law compander. The μ-Law and A-Law ...
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AI+ V DDA 1 -1.2 DDA V SSA Table 7.1 Input Amplifier Modes of operation When the input amplifier is powered down, the input signal AI- needs to be referenced to the analog ground voltage ...
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P M OWER ANAGEMENT 7.3.1. Analog Supply The power supply for the analog part of the W6811 needs +/- 10%. This supply voltage is connected to the V pin. The V DDA capacitor. 7.3.2. Digital Supply ...
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HIGH for two consecutive falling edges of the bit-clock at the BCLKT pin. The length of the Frame Sync pulse can vary from frame to frame, as long as the positive frame sync edge occurs every 125 μsec. During ...
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Interchip Digital Link (IDL) The IDL interface mode is selected when the BCLKR pin is connected to V sync cycles. It can be used as a 2B+D timing interface in an ISDN application. The IDL interface consists of 4 ...
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TIMING DIAGRAMS T T FTRHM FTRSM MCLK FST T T FTRH FTRS BCLKT FDTD PCMT D7 D6 MSB FSR T T FRRH FRRS BCLKR PCMR D7 D6 MSB T DRS T T ...
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SYMBOL DESCRIPTION 1/T FST, FSR Frequency FS T FST / FSR Minimum LOW Width FSL 1/T BCLKT, BCLKR Frequency BCK T BCLKT, BCLKR HIGH Pulse Width BCKH T BCLKT, BCLKR LOW Pulse Width BCKL T BCLKT 0 Falling Edge to ...
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FTRHM FTRSM MCKH MCLK T FTFH T FTFS FST T T FTRH FTRS BCLKT - BDTD PCMT D7 D6 MSB T FRFH T FRFS FSR T T FRRH FRRS BCLKR - ...
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SYMBOL DESCRIPTION 1/T FST, FSR Frequency FS 1/T BCLKT, BCLKR Frequency BCK T BCLKT, BCLKR HIGH Pulse Width BCKH T BCLKT, BCLKR LOW Pulse Width BCKL T BCLKT –1 Falling Edge to FST Rising Edge Hold FTRH Time T FST ...
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FST T FSFH T T FSRH FSRS BCLKT - BDTD PCMT MSB T DRS PCMR MSB SYMBOL DESCRIPTION 1/T FST ...
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FST T FSFH T T FSRH FSRS BCLKT ...
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SYMBOL DESCRIPTION 1/T Master Clock Frequency MCK MCLK Duty Cycle for 256 kHz Operation MCKH MCK T Minimum Pulse Width HIGH for MCLK(512 kHz MCKH or Higher) T Minimum Pulse Width LOW for MCLK (512 kHz MCKL ...
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ABSOLUTE MAXIMUM RATINGS 9. BSOLUTE AXIMUM Condition Junction temperature Storage temperature range Voltage Applied to any pin Voltage applied to any pin (Input current limited to +/-20 mA DDA SSA ...
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ELECTRICAL CHARACTERISTICS 10. ENERAL ARAMETERS Symbo Parameters l V Input LOW Voltage IL V Input HIGH Voltage IH V PCMT Output LOW Voltage OL V PCMT Output HIGH Voltage OH V Current (Operating) -ADC+DAC I DDA DDA ...
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NALOG IGNAL EVEL AND =5V ±10 =0V; T =-40°C to +85°C; all analog signals referred to V DDA SSA A FST=FSR=8kHz Synchronous operation. PARAMETER SYM. Absolute Level L 0 dBm0 = 0dBm @ 600Ω ...
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A D NALOG ISTORTION AND =5V ±10 =0V; T =-40°C to +85°C; all analog signals referred to V DDA SSA A FST=FSR=8kHz Synchronous operation. PARAMETER SYM. Total Distortion vs. D LTμ Level Tone (1020 Hz, μ-Law, C-Message ...
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NALOG NPUT AND =5V ±10 =0V; T =-40°C to +85°C; all analog signals referred to V DDA SSA A PARAMETER AI Input Offset Voltage AI Input Current AI Input Resistance AI Input Capacitance AI ...
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PARAMETER Output Offset Voltage Load Resistance Load Capacitance PO Output Current PO Output Resistance PO Differential Gain PO Differential Signal to Distortion C-Message weighted PO Power Supply Rejection Ratio ( kHz DDA Differential out) SYM. ...
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D I/O IGITAL 10.5.1. μ-Law Encode Decode Chatacteristics Normalized Encode D7 D6 Decision Sign Chord Levels 8159 1 0 7903 : 4319 1 0 4063 : 2143 1 0 2015 : 1055 1 0 991 : 511 1 0 ...
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A-Law Encode Decode Characteristics Normalized D7 D6 Encode Sign Chord Decision Levels 4096 1 0 3968 : 2048 1 0 2048 : 1088 1 0 1024 : 544 1 0 512 : 272 1 0 256 : 136 1 ...
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PCM Codes for Zero and Full Scale Level Sign bit Chord bits (D7) (D6,D5,D4) + Full Scale 1 + Zero 1 - Zero 0 - Full Scale 0 10.5.4. PCM Codes for 0dBm0 Output Sample Sign bit Chord bits ...
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TYPICAL APPLICATION CIRCUIT 1 DIFFERENTIAL AUDIO IN + 1.0 uF 0 DIFFERENTIAL AUDIO OUT RL > 150 ohms + Figure 11.1 Typical circuit for Differential Analog I/O’s 1.0 uF AUDIO IN 1.0 uF ...
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ELECTRET MICROPHONE 0.01 uF 0.1 uF 27K 1.5K SPEAKER 27K 1.0 uF 0.01 uF 600 0.1 uF TRANSFORMER 600 OHM 1:1 Figure 11.4 Transformer Interface Circuit in GCI mode +5VDC ...
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PACKAGE SPECIFICATION 12.1. 24L TSSOP - 4.4X7.8 PLASTIC THIN SHRINK SMALL OUTLINE PACKAGE (TSSOP) DIMENSIONS DIMENSION IN MM SYMBOL MIN A A1 0.05 A2 0. 4.30 D 7.70 b 0. ...
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SOP-300 MIL SMALL OUTLINE PACKAGE (SAME AS SOG & SOIC) DIMENSIONS SEATING PLANE SEATING PLANE SYMBOL ...
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SSOP-209 MIL SHRINK SMALL OUTLINE PACKAGE DIMENSIONS Publication Release Date: September, September, 2005 - 33 - W6811 Revision A12 ...
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PDIP – 300 MIL PLASTIC DUAL INLINE PACKAGE DIMENSIONS DIMENSION IN MM SYMBOL MIN A A1 0.25 A2 3.18 B 0.41 B1 1.47 c 0.20 D ...
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... Plastic Thin Small Outline Package (TSSOP) Type 24-Lead Plastic Small Outline Package (SOG/SOP 24-Lead Plastic Small Outline Package (SSOP 24-Lead Plastic Dual Inline Package (PDIP) Part Number W6811IW W6811IS W6811IR W6811IE W6811IWG W6811ISG W6811IRG W6811IEG Publication Release Date: September, September, 2005 - 35 - W6811 Revision A12 ...
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VERSION HISTORY VERSION DATE PAGE A7 August 9, 2002 A8 September 26, 2002 A9 October 10, 2002 A10 October 34 23, 2003 A11 April 2005 41 A12 September, 2005 11 29 Preliminary Changed ...
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Winbond products are not designed, intended, authorized or warranted for use as components in systems or equipment intended for surgical implantation, atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, or for other ...