X9221AWP Intersil, X9221AWP Datasheet
X9221AWP
Specifications of X9221AWP
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X9221AWP Summary of contents
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... CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. | 1-888-INTERSIL or 1-888-468-3774 Intersil (and design registered trademark of Intersil Americas Inc. XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005-2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners. X9221A 64 Taps, 2-Wire Serial Bus FN8163 ...
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... NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. ...
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PIN NAMES Symbol Description SCL Serial Clock SDA Serial Data A0–A3 Address Potentiometers (terminal equivalent Potentiometers ...
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The next four bits of the slave address are the device address. The physical device address is defined by the state of the A0-A3 inputs. The X9221A compares the serial data stream with the address input state; a successful compare ...
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For each SCL clock pulse (t ) while SDA is HIGH, the selected wiper will HIGH move one resistor segment towards the V nal. Similarly, for each SCL clock pulse while SDA is Figure 3. ...
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Figure 6. Increment/Decrement Timing Limits INC/DEC CMD Issued SCL SDA Table 1. Instruction Set Instruction Read WCR 1 0 Write WCR 1 0 Read Data Register 1 0 Write Data Register 1 ...
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Figure 7. Acknowledge Response from Receiver SCL from Master Data Output from Transmitter Data Output from Receiver START DETAILED OPERATION Both XDCP potentiometers share the serial interface and share a common architecture. Each potentiometer is comprised of a resistor array, ...
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Figure 8. Detailed Potentiometer Block Diagram Serial Data Path From Interface Circuitry Register 0 Register 2 If WCR = 00[H] then WCR = 3F[H] then ...
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ABSOLUTE MAXIMUM RATINGS Temperature Under Bias ................... -65°C to +135°C Storage Temperature ........................ -65°C to +150°C Voltage on SCK, SCL or Any Address Input With Respect to V ...................... -1V to +7V SS Voltage on Any ...
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D.C. OPERATING CHARACTERISTICS (Over recommended operating conditions unless otherwise stated.) Symbol Parameter l Supply Current (Active Current (Standby Input Leakage Current LI I Output Leakage Current LO V Input HIGH Voltage IH V Input ...
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A.C. CONDITIONS OF TEST Input pulse levels V CC Input rise and fall times 10ns Input and output timing levels V CC SYMBOL TABLE WAVEFORM INPUTS Must be steady May change from LOW to HIGH May change from HIGH to ...
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A.C. CHARACTERISTICS (Over recommended operating conditions unless otherwise stated) Symbol f SCL clock frequency SCL t Clock LOW period LOW t Clock HIGH period HIGH t SCL and SDA rise time R t SCL and SDA fall time F T ...
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Figure 12. Start Stop Timing SCL t SU:STA SDA (Data in) Figure 13. Write Cycle and Wiper Response Timing SCL Clock 8 SDA SDA IN Wiper Output 13 X9221A START Condition t HD:STA Clock 9 STOP ACK STOP Condition t ...
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Small Outline Package Family (SO PIN #1 I.D. MARK 0.010 SEATING PLANE 0.004 C 0.010 MDP0027 SMALL OUTLINE PACKAGE FAMILY (SO) SYMBOL SO-8 SO-14 ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...