PIC12F635-I/P Microchip Technology, PIC12F635-I/P Datasheet - Page 96

• Manufacturer Part Number: PIC12F635-I/P
• Description: IC MCU FLASH 1KX14 8DIP
• Manufacturer: Microchip Technology
• Series: PIC® 12Fr

Specifications of PIC12F635-I/P

• Program Memory Type: FLASH
• Program Memory Size: 1.75KB (1K x 14)
• Package / Case: 8-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 5
• Eeprom Size: 128 x 8
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC12F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 64 B
• Interface Type: RS- 232/SPI/USB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 2
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164120, DM163029, DV164101, DM163014
• Minimum Operating Temperature: - 40 C
• Data Rom Size: 128 B
• Height: 3.3 mm
• Length: 9.27 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2 V
• Width: 6.35 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM163029 - BOARD PICDEM FOR MECHATRONICSAC162057 - MPLAB ICD 2 HEADER 14DIPACICE0201 - MPLABICE 8P 300 MIL ADAPTERAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC12F635/PIC16F636/639
9.5
There are conditions when the user may not want to
write to the data EEPROM memory. To protect against
spurious EEPROM writes, various mechanisms have
been built in. On power-up, WREN is cleared. Also, the
Power-up Timer (nominal 64 ms duration) prevents
EEPROM write.
The write initiate sequence and the WREN bit together
help prevent an accidental write during:
• Brown-out
• Power Glitch
• Software Malfunction
TABLE 9-1:
DS41232D-page 94
INTCON
PIR1
PIE1
EEDAT
EEADR
EECON1
EECON2
Legend:
Note 1:
Name
Protection Against Spurious Write
EEPROM Control Register 2 (not a physical register)
x = unknown, u = unchanged, – = unimplemented read as ‘0’, q = value depends upon condition.
Shaded cells are not used by the data EEPROM module.
PIC16F636/639 only.
EEADR7
EEDAT7
EEIE
Bit 7
EEIF
GIE
—
SUMMARY OF REGISTERS ASSOCIATED WITH DATA EEPROM
(1)
EEDAT6
EEADR6
LVDIF
LVDIE
Bit 6
PEIE
—
EEADR5
EEDAT5
CRIE
Bit 5
CRIF
T0IE
—
EEADR4
EEDAT4
C2IE
C2IF
Bit 4
INTE
—
(1)
(1)
EEDAT3
EEADR3
WRERR
RAIE
Bit 3
C1IF
C1IE
EEDAT2
EEADR2
9.6
Data memory can be code-protected by programming
the CPD bit in the Configuration Word (Register 12-1)
to ‘0’.
When the data memory is code-protected, the CPU is
able to read and write data to the data EEPROM. It is
recommended to code-protect the program memory
when code-protecting data memory. This prevents
anyone from programming zeroes over the existing
code (which will execute as NOPs) to reach an added
routine, programmed in unused program memory,
which
Programming unused locations in program memory to
‘0’ will also help prevent data memory code protection
from becoming breached.
OSFIF
OSFIE
WREN
Bit 2
T0IF
outputs
Data EEPROM Operation During
Code Protection
EEDAT1
EEADR1
Bit 1
INTF
WR
—
—
the
EEDAT0
EEADR0
TMR1IF
TMR1IE
Bit 0
RAIF
RD
contents
© 2007 Microchip Technology Inc.
0000 000x
0000 00-0
0000 00-0
0000 0000
0000 0000
---- x000
---- ----
POR, BOR
Value on
of
data
0000 000x
0000 00-0
0000 00-0
0000 0000
0000 0000
---- q000
---- ----
Value on
all other
Resets
memory.