ATTINY85-20SU Atmel, ATTINY85-20SU Datasheet - Page 93

IC AVR MCU 8K 20MHZ 8SOIC

ATTINY85-20SU

Manufacturer Part Number
ATTINY85-20SU
Description
IC AVR MCU 8K 20MHZ 8SOIC
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheets

Specifications of ATTINY85-20SU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
6
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Processor Series
ATTINY8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
USI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
6
Number Of Timers
2
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
4-ch x 10-bit
For Use With
ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIPATAVRBC100 - REF DESIGN KIT BATTERY CHARGER770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY85-20SU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
12.3.2
2586M–AVR–07/10
GTCCR – General Timer/Counter1 Control Register
• Bits 3:0 - CS1[3:0]: Clock Select Bits 3, 2, 1, and 0
The Clock Select bits 3, 2, 1, and 0 define the prescaling source of Timer/Counter1.
Table 12-5.
The Stop condition provides a Timer Enable/Disable function.
• Bit 6 – PWM1B: Pulse Width Modulator B Enable
When set (one) this bit enables PWM mode based on comparator OCR1B in Timer/Counter1
and the counter value is reset to $00 in the CPU clock cycle after a compare match with OCR1C
register value.
• Bits 5:4 – COM1B[1:0]: Comparator B Output Mode, Bits 1 and 0
The COM1B1 and COM1B0 control bits determine any output pin action following a compare
match with compare register B in Timer/Counter1. Since the output pin action is an alternative
function to an I/O port, the corresponding direction control bit must be set (one) in order to con-
trol an output pin.
Bit
0x2C
Read/Write
Initial value
CS13
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Timer/Counter1 Prescale Select
TSM
R/W
7
0
CS12
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
PWM1B
R/W
6
0
COM1B1
CS11
R/W
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
5
0
COM1B0
R/W
4
0
CS10
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
FOC1B
W
3
0
Asynchronous
Clocking Mode
T/C1 stopped
PCK
PCK/2
PCK/4
PCK/8
PCK/16
PCK/32
PCK/64
PCK/128
PCK/256
PCK/512
PCK/1024
PCK/2048
PCK/4096
PCK/8192
PCK/16384
FOC1A
W
2
0
PSR1
R/W
1
0
Synchronous
Clocking Mode
T/C1 stopped
CK
CK/2
CK/4
CK/8
CK/16384
CK/16
CK/32
CK/64
CK/128
CK/256
CK/512
CK/1024
CK/2048
CK/4096
CK/8192
PSR0
R/W
0
0
GTCCR
93

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