PIC16LF627A-I/SO Microchip Technology, PIC16LF627A-I/SO Datasheet - Page 125
PIC16LF627A-I/SO
Manufacturer Part Number
PIC16LF627A-I/SO
Description
IC MCU FLASH 1KX14 EEPROM 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F627A-IP.pdf
(180 pages)
2.PIC16LF627A-IP.pdf
(8 pages)
3.PIC16LF627A-ISO.pdf
(180 pages)
Specifications of PIC16LF627A-I/SO
Core Size
8-Bit
Program Memory Size
1.75KB (1K x 14)
Core Processor
PIC
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
224 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
18-SOIC (7.5mm Width)
Controller Family/series
PIC16LF
No. Of I/o's
16
Eeprom Memory Size
128Byte
Ram Memory Size
224Byte
Cpu Speed
20MHz
No. Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
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© 2005 Microchip Technology Inc.
IORLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
IORWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
Inclusive OR Literal with W
[ label ]
0
(W) .OR. k
Z
11
The contents of the W register is
OR’ed with the eight-bit literal
‘k’. The result is placed in the W
register.
1
1
IORLW
Before Instruction
After Instruction
Inclusive OR W with f
[ label ]
0
d
(W) .OR. (f)
Z
00
Inclusive OR the W register with
register ‘f’. If ‘d’ is ‘0’, the result
is placed in the W register. If ‘d’
is ‘1’, the result is placed back in
register ‘f’.
1
1
IORWF
Before Instruction
After Instruction
k
f
[0,1]
REG1 = 0x13
W
REG1 = 0x13
W
Z
127
255
W = 0x9A
W = 0xBF
Z = 0
1000
0x35
0100
REG1, 0
IORLW k
IORWF
= 0x91
= 0x93
= 1
(W)
(dest)
kkkk
dfff
f,d
kkkk
ffff
PIC16F627A/628A/648A
MOVLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
MOVF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
Move Literal to W
[ label ]
0
k
None
11
The eight bit literal ‘k’ is loaded
into W register. The “don’t
cares” will assemble as ‘0’s.
1
1
MOVLW
After Instruction
Move f
[ label ]
0
d
(f)
Z
00
The contents of register ‘f’ is
moved to a destination
dependent upon the status of
‘d’. If d = 0, destination is W
register. If d = 1, the destination
is file register f itself. d = 1 is
useful to test a file register since
status flag Z is affected.
1
1
MOVF
After Instruction
k
f
W= value in REG1 register
Z = 1
[0,1]
(W)
W = 0x5A
(dest)
127
255
00xx
0x5A
1000
REG1, 0
MOVLW k
MOVF f,d
DS40044D-page 123
kkkk
dfff
kkkk
ffff
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