ATMEGA48A-PU Atmel, ATMEGA48A-PU Datasheet - Page 186

IC MCU AVR 4K FLASH 28PDIP

ATMEGA48A-PU

Manufacturer Part Number
ATMEGA48A-PU
Description
IC MCU AVR 4K FLASH 28PDIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA48A-PU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
Atmega
No. Of I/o's
23
Eeprom Memory Size
256Byte
Ram Memory Size
512Byte
Cpu Speed
20MHz
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA48A-PU
Manufacturer:
Microchip Technology
Quantity:
1 051
19.6.3
8271C–AVR–08/10
Transmitter Flags and Interrupts
Notes:
The ninth bit can be used for indicating an address frame when using multi processor communi-
cation mode or for other protocol handling as for example synchronization.
The USART Transmitter has two flags that indicate its state: USART Data Register Empty
(UDREn) and Transmit Complete (TXCn). Both flags can be used for generating interrupts.
The Data Register Empty (UDREn) Flag indicates whether the transmit buffer is ready to receive
new data. This bit is set when the transmit buffer is empty, and cleared when the transmit buffer
contains data to be transmitted that has not yet been moved into the Shift Register. For compat-
ibility with future devices, always write this bit to zero when writing the UCSRnA Register.
When the Data Register Empty Interrupt Enable (UDRIEn) bit in UCSRnB is written to one, the
USART Data Register Empty Interrupt will be executed as long as UDREn is set (provided that
global interrupts are enabled). UDREn is cleared by writing UDRn. When interrupt-driven data
transmission is used, the Data Register Empty interrupt routine must either write new data to
ATmega48A/48PA/88A/88PA/168A/168PA/328/328
Assembly Code Example
C Code Example
USART_Transmit:
void USART_Transmit( unsigned int data )
{
}
; Wait for empty transmit buffer
in r16, UCSRnA
sbrs r16, UDREn
rjmp USART_Transmit
; Copy 9th bit from r17 to TXB8
cbi
sbrc r17,0
sbi
; Put LSB data (r16) into buffer, sends the data
out
ret
/* Wait for empty transmit buffer */
while ( !( UCSRnA & (1<<UDREn))) )
/* Copy 9th bit to TXB8 */
UCSRnB &= ~(1<<TXB8);
if ( data & 0x0100 )
/* Put data into buffer, sends the data */
UDRn = data;
1. These transmit functions are written to be general functions. They can be optimized if the con-
2.
UCSRnB |= (1<<TXB8);
See ”About Code Examples” on page 7.
tents of the UCSRnB is static. For example, only the TXB8 bit of the UCSRnB Register is used
after initialization.
UCSRnB,TXB8
UCSRnB,TXB8
UDRn,r16
;
(1)(2)
(1)(2)
186

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