ATMEGA48A-PU Atmel, ATMEGA48A-PU Datasheet - Page 288
Manufacturer Part Number
IC MCU AVR 4K FLASH 28PDIP
Specifications of ATMEGA48A-PU
I²C, SPI, UART/USART
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
Program Memory Size
4KB (2K x 16)
Program Memory Type
256 x 8
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
No. Of I/o's
Eeprom Memory Size
Ram Memory Size
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Preventing Flash Corruption
Programming Time for Flash when Using SPM
Simple Assembly Code Example for a Boot Loader
During periods of low V
too low for the CPU and the Flash to operate properly. These issues are the same as for board
level systems using the Flash, and the same design solutions should be applied.
A Flash program corruption can be caused by two situations when the voltage is too low. First, a
regular write sequence to the Flash requires a minimum voltage to operate correctly. Secondly,
the CPU itself can execute instructions incorrectly, if the supply voltage for executing instructions
is too low.
Flash corruption can easily be avoided by following these design recommendations (one is
1. If there is no need for a Boot Loader update in the system, program the Boot Loader Lock
2. Keep the AVR RESET active (low) during periods of insufficient power supply voltage.
3. Keep the AVR core in Power-down sleep mode during periods of low V
The calibrated RC Oscillator is used to time Flash accesses.
gramming time for Flash accesses from the CPU.
Device Signature Byte 1
Device Signature Byte 2
Device Signature Byte 3
RC Oscillator Calibration Byte
Flash write (Page Erase, Page Write, and
write Lock bits by SPM)
bits to prevent any Boot Loader software updates.
This can be done by enabling the internal Brown-out Detector (BOD) if the operating volt-
age matches the detection level. If not, an external low V
used. If a reset occurs while a write operation is in progress, the write operation will be
completed provided that the power supply voltage is sufficient.
vent the CPU from attempting to decode and execute instructions, effectively protecting
the SPMCSR Register and thus the Flash from unintentional writes.
;-the routine writes one page of data from RAM to Flash
; the first data location in RAM is pointed to by the Y pointer
; the first data location in Flash is pointed to by the Z-pointer
;-error handling is not included
All other addresses are reserved for future use.
1. Minimum and maximum programming time is per individual operation.
Signature Row Addressing
SPM Programming Time
, the Flash program can be corrupted because the supply voltage is
Min. Programming Time
reset protection circuit can be
Max Programming Time
shows the typical pro-
. This will pre-