ATMEGA48A-PU Atmel, ATMEGA48A-PU Datasheet - Page 86

IC MCU AVR 4K FLASH 28PDIP

ATMEGA48A-PU

Manufacturer Part Number
ATMEGA48A-PU
Description
IC MCU AVR 4K FLASH 28PDIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA48A-PU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
Atmega
No. Of I/o's
23
Eeprom Memory Size
256Byte
Ram Memory Size
512Byte
Cpu Speed
20MHz
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA48A-PU
Manufacturer:
Microchip Technology
Quantity:
1 051
13.3.2
8271C–AVR–08/10
Alternate Functions of Port C
Table 13-5.
The Port C pins with alternate functions are shown in
Table 13-6.
ATmega48A/48PA/88A/88PA/168A/168PA/328/328
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
Port Pin
PC6
PC5
PC4
PC3
PC2
PC1
PC0
PB3/MOSI/
OC2/PCINT3
SPE • MSTR
PORTB3 • PUD
SPE • MSTR
0
SPE • MSTR +
OC2A ENABLE
SPI MSTR OUTPUT
+ OC2A
PCINT3 • PCIE0
1
PCINT3 INPUT
SPI SLAVE INPUT
Overriding Signals for Alternate Functions in PB3...PB0
Port C Pins Alternate Functions
Alternate Function
RESET (Reset pin)
PCINT14 (Pin Change Interrupt 14)
ADC5 (ADC Input Channel 5)
SCL (2-wire Serial Bus Clock Line)
PCINT13 (Pin Change Interrupt 13)
ADC4 (ADC Input Channel 4)
SDA (2-wire Serial Bus Data Input/Output Line)
PCINT12 (Pin Change Interrupt 12)
ADC3 (ADC Input Channel 3)
PCINT11 (Pin Change Interrupt 11)
ADC2 (ADC Input Channel 2)
PCINT10 (Pin Change Interrupt 10)
ADC1 (ADC Input Channel 1)
PCINT9 (Pin Change Interrupt 9)
ADC0 (ADC Input Channel 0)
PCINT8 (Pin Change Interrupt 8)
PB2/SS/
OC1B/PCINT2
SPE • MSTR
PORTB2 • PUD
SPE • MSTR
0
OC1B ENABLE
OC1B
PCINT2 • PCIE0
1
PCINT2 INPUT
SPI SS
Table
PB1/OC1A/
PCINT1
0
0
0
0
OC1A ENABLE
OC1A
PCINT1 • PCIE0
1
PCINT1 INPUT
13-6.
PB0/ICP1/
PCINT0
0
0
0
0
0
0
PCINT0 • PCIE0
1
PCINT0 INPUT
ICP1 INPUT
86

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