PIC16F627-04/SO Microchip Technology, PIC16F627-04/SO Datasheet - Page 99

• Manufacturer Part Number: PIC16F627-04/SO
• Description: IC MCU FLASH 1KX14 COMP 18SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F627-04/SO

• Core Size: 8-Bit
• Program Memory Size: 1.75KB (1K x 14)
• Core Processor: PIC
• Speed: 4MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 224 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 18-SOIC (7.5mm Width)
• Controller Family/series: PIC16F
• No. Of I/o's: 16
• Eeprom Memory Size: 128Byte
• Ram Memory Size: 224Byte
• Cpu Speed: 4MHz
• No. Of Timers: 3
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 224 B
• Interface Type: SCI, USART
• Maximum Clock Frequency: 4 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 3
• Operating Supply Voltage: 3 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT18SO-1 - SOCKET TRANSITION 18SOIC 300MILAC164010 - MODULE SKT PROMATEII DIP/SOIC
• Data Converters: -
• Lead Free Status / Rohs Status: Details

14.5.5
On power-up the timeout sequence is as follows: First
PWRT timeout is invoked after POR has expired. Then
OST is activated. The total timeout will vary based on
oscillator configuration and PWRTE bit status. For
example, in ER mode with PWRTE bit erased (PWRT
disabled), there will be no timeout at all. Figure 14-8,
Figure 14-9
sequences.
Since the timeouts occur from the POR pulse, if MCLR
is kept low long enough, the timeouts will expire. Then
bringing MCLR high will begin execution immediately
(see Figure 14-9). This is useful for testing purposes or
to synchronize more than one PIC16F62X device
operating in parallel.
Table 14-7 shows the RESET conditions for some
special registers, while Table 14-8 shows the RESET
conditions for all the registers.
TABLE 14-4:
TABLE 14-5:
TABLE 14-6:
 2003 Microchip Technology Inc.
Address
03h
8Eh
Note
XT, HS, LP
ER, INTRC, EC
Legend: u = unchanged, x = unknown.
Oscillator Configuration
POR
0
0
0
1
1
1
1
1
1: Other (non Power-up) Resets include MCLR Reset, Brown-out Detect Reset and Watchdog Timer Reset during normal opera-
STATUS
PCON
tion.
Name
TIMEOUT SEQUENCE
BOD
and
X
X
X
0
1
1
1
1
TIMEOUT IN VARIOUS SITUATIONS
STATUS/PCON BITS AND THEIR SIGNIFICANCE
SUMMARY OF REGISTERS ASSOCIATED WITH BROWN-OUT
Bit 7
IRP
Figure 14-10
—
TO
1
0
X
X
0
0
u
1
Bit 6
RP1
—
72 ms + 1024 T
PWRTE = 0
PD
1
X
0
X
u
0
u
0
depict
Bit 5
RPO
72 ms
—
Power-on Reset
Illegal, TO is set on POR
Illegal, PD is set on POR
Brown-out Detect Reset
WDT Reset
WDT Wake-up
MCLR Reset during normal operation
MCLR Reset during SLEEP
timeout
OSC
Bit 4
Power-up
TO
—
Preliminary
OSCF
Bit 3
PD
PWRTE = 1
1024 T
14.5.6
The Power Control/STATUS register, PCON (address
8Eh) has two bits.
Bit0 is BOD (Brown-out). BOD is unknown on Power-
on Reset. It must then be set by the user and checked
on subsequent RESETS to see if BOD = 0 indicating
that a brown-out has occurred. The BOD STATUS bit is
a don’t care and is not necessarily predictable if the
brown-out circuit is disabled (by setting BODEN bit = 0
in the Configuration word).
Bit1 is POR (Power-on Reset). It is a ‘0’ on Power-on
Reset and unaffected otherwise. The user must write a
‘1’ to this bit following a Power-on Reset. On a
subsequent RESET if POR is ‘0’, it will indicate that a
Power-on Reset must have occurred (V
gone too low).
—
Reset
Bit 2
OSC
Z
POWER CONTROL (PCON) STATUS
REGISTER
Bit 1
POR
DC
72 ms + 1024 T
Brown-out Detect
Bit 0
BOD
Reset
72 ms
C
PIC16F62X
0001 1xxx
---- 1-0x
POR Reset
Value on
OSC
DS40300C-page 97
from SLEEP
DD
1024 T
Wake-up
Value on all
000q quuu
---- u-uq
RESETS
may have
—
other
OSC
(1)