ATMEGA48-20MMU Atmel, ATMEGA48-20MMU Datasheet - Page 265

• Manufacturer Part Number: ATMEGA48-20MMU
• Description: IC AVR MCU 4K FLASH 20MHZ 28QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA48-20MMU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 4KB (2K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Processor Series: ATMEGA48x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: 2-Wire/SPI/USART/Serial
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Package: 28MLF EP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• For Use With: ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2545S–AVR–07/10
Wrloop:
Rdloop:
Return:
Do_spm:
Wait_spm:
rcallDo_spm
; transfer data from RAM to Flash page buffer
ldi
ldi
ld
ld
ldi
rcallDo_spm
adiw ZH:ZL, 2
sbiw loophi:looplo, 2
brne Wrloop
; execute Page Write
subi ZL, low(PAGESIZEB)
sbci ZH, high(PAGESIZEB)
ldi
rcallDo_spm
; re-enable the RWW section
ldi
rcallDo_spm
; read back and check, optional
ldi
ldi
subi YL, low(PAGESIZEB)
sbci YH, high(PAGESIZEB)
lpm
ld
cpse r0, r1
rjmp Error
sbiw loophi:looplo, 1
brne Rdloop
; return to RWW section
; verify that RWW section is safe to read
in
sbrs temp1, RWWSB
ret
; re-enable the RWW section
ldi
rcallDo_spm
rjmp Return
; check for previous SPM complete
in
sbrc temp1, SELFPRGEN
rjmp Wait_spm
; input: spmcrval determines SPM action
; disable interrupts if enabled, store status
in
cli
; check that no EEPROM write access is present
looplo, low(PAGESIZEB)
loophi, high(PAGESIZEB)
r0, Y+
r1, Y+
spmcrval, (1<<SELFPRGEN)
spmcrval, (1<<PGWRT) | (1<<SELFPRGEN)
spmcrval, (1<<RWWSRE) | (1<<SELFPRGEN)
looplo, low(PAGESIZEB)
loophi, high(PAGESIZEB)
r0, Z+
r1, Y+
temp1, SPMCSR
spmcrval, (1<<RWWSRE) | (1<<SELFPRGEN)
temp1, SPMCSR
temp2, SREG
; If RWWSB is set, the RWW section is not ready yet
;init loop variable
;not required for PAGESIZEB<=256
;use subi for PAGESIZEB<=256
;restore pointer
;not required for PAGESIZEB<=256
;init loop variable
;not required for PAGESIZEB<=256
;restore pointer
;use subi for PAGESIZEB<=256
ATmega48/88/168
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