PIC12CE674-04/P Microchip Technology, PIC12CE674-04/P Datasheet - Page 84
PIC12CE674-04/P
Manufacturer Part Number
PIC12CE674-04/P
Description
IC MCU OTP 2KX14 A/D&EE 8DIP
Manufacturer
Microchip Technology
Series
PIC® 12Cr
Datasheets
1.PIC16F688T-ISL.pdf
(688 pages)
2.PIC12CE673-10P.pdf
(129 pages)
3.PIC12CE673-10P.pdf
(3 pages)
4.PIC12CE673-10P.pdf
(14 pages)
5.PIC12CE673-10P.pdf
(12 pages)
Specifications of PIC12CE674-04/P
Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Core Processor
PIC
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Type
OTP
Eeprom Size
16 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
8-DIP (0.300", 7.62mm)
Controller Family/series
PIC12
No. Of I/o's
6
Eeprom Memory Size
16Byte
Ram Memory Size
128Byte
Cpu Speed
4MHz
No. Of Timers
1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMINGAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC12CE674-04/P
Manufacturer:
MIC
Quantity:
1 226
Part Number:
PIC12CE674-04/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC16F688T-ISL PDF datasheet
- PIC12CE673-10P PDF datasheet #2
- PIC12CE673-10P PDF datasheet #3
- PIC12CE673-10P PDF datasheet #4
- PIC12CE673-10P PDF datasheet #5
- Current page: 84 of 688
- Download datasheet (3Mb)
PICmicro MID-RANGE MCU FAMILY
5.1
DS31005A-page 5-2
Introduction
The Central Processing Unit (CPU) is responsible for using the information in the program mem-
ory (instructions) to control the operation of the device. Many of these instructions operate on
data memory. To operate on data memory, the Arithmetic Logical Unit (ALU) is required. In addi-
tion to performing arithmetical and logical operations, the ALU controls status bits (which are
found in the STATUS register). The result of some instructions force status bits to a value depend-
ing on the state of the result.
The machine codes that the CPU recognizes are show in
mnemonics that the MPASM uses to generate these codes).
Table 5-1
1997 Microchip Technology Inc.
(as well as the instruction
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