AT89C51RC-24PU Atmel, AT89C51RC-24PU Datasheet - Page 22

• Manufacturer Part Number: AT89C51RC-24PU
• Description: IC MCU 32K FLASH 24MHZ 40-DIP
• Manufacturer: Atmel
• Series: 89Cr

Specifications of AT89C51RC-24PU

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 24MHz
• Connectivity: SPI, UART/USART
• Peripherals: WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Cpu Family: 89C
• Device Core: 8051
• Device Core Size: 8b
• Frequency (max): 24MHz
• Interface Type: UART
• Total Internal Ram Size: 512Byte
• # I/os (max): 32
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Through Hole
• Pin Count: 40
• Package Type: PDIP
• Processor Series: AT89x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3 bit
• Operating Supply Voltage: 4 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• For Use With: AT89STK-11 - KIT STARTER FOR AT89C51RX2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant

22
AT89C51RC
Chip Erase Sequence: Before the AT89C51RC can be reprogrammed, a Chip Erase operation
needs to be performed. To erase the contents of the AT89C51RC, follow this sequence:
Data Polling: The AT89C51RC features Data Polling to indicate the end of a write cycle. During
a write cycle, an attempted read of the last byte written will result in the complement of the writ-
ten data on P0.7. Once the write cycle has been completed, true data is valid on all outputs, and
the next cycle may begin. Data Polling may begin any time after a write cycle has been initiated.
Ready/Busy: The progress of byte programming can also be monitored by the RDY/BSY output
signal. P3.0 is pulled low after ALE goes high during programming to indicate BUSY. P3.0 is
pulled high again when programming is done to indicate READY.
Program Verify: If lock bits LB1 and LB2 have not been programmed, the programmed code
data can be read back via the address and data lines for verification. The status of the individual
lock bits can be verified directly by reading them back.
Reading the Signature Bytes: The signature bytes are read by the same procedure as a nor-
mal verification of locations 000H, 100H, and 200H, except that P3.6 and P3.7 must be pulled to
a logic low. The values returned are as follows:
1. Raise V
2. Pulse ALE/PROG once (duration of 200 ns - 500 ns) and wait for 150 ms.
3. Power V
4. Pulse ALE/PROG once (duration of 200 ns - 500 ns) and wait for 150 ms.
5. Power V
(000H) = 1EH indicates manufactured by Atmel
(100H) = 51H
(200H) = 07H indicates 89C51RC
CC
CC
CC
to 6.5V.
down and up to 6.5V.
down and up.
1920D–MICRO–6/08