PIC18F46K20-I/PT Microchip Technology, PIC18F46K20-I/PT Datasheet - Page 34

• Manufacturer Part Number: PIC18F46K20-I/PT
• Description: IC PIC MCU FLASH 32KX16 44-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F46K20-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 64KB (32K x 16)
• Package / Case: 44-TQFP, 44-VQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 35
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: CCP, ECCP, EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 14 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPDM164124 - KIT STARTER FOR PIC18F4XK20AC164305 - MODULE SKT FOR PM3 44TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F2XK20/4XK20
5.3
The LVP bit in Configuration register, CONFIG4L,
enables Single-Supply (Low-Voltage) ICSP Program-
ming. The LVP bit defaults to a ‘1’ (enabled) from the
factory.
If Single-Supply Programming mode is not used, the
LVP bit can be programmed to a ‘0’ and RB5/PGM
becomes a digital I/O pin. However, the LVP bit may
only be programmed by entering the High-Voltage
ICSP mode, where MCLR/V
Once the LVP bit is programmed to a ‘0’, only the
High-Voltage ICSP mode is available and only the
High-Voltage ICSP mode can be used to program the
device.
5.4
To allow portability of code, a PIC18F2XK20/4XK20
programmer is required to read the Configuration Word
locations from the hex file. If Configuration Word infor-
mation is not present in the hex file, then a simple warn-
ing message should be issued. Similarly, while saving
a hex file, all Configuration Word information must be
included. An option to not include the Configuration
Word information may be provided. When embedding
Configuration Word information in the hex file, it should
start at address 300000h.
Microchip Technology Inc. feels strongly that this
feature is important for the benefit of the end customer.
DS41297F-page 34
Note 1: The High-Voltage ICSP mode is always
2: While in Low-Voltage ICSP mode, the
Single-Supply ICSP Programming
Embedding Configuration Word
Information in the HEX File
available, regardless of the state of the
LVP bit, by applying V
V
RB5 pin can no longer be used as a
general purpose I/O.
PP
/RE3 pin.
PP
/RE3 is raised to V
IHH
to the MCLR/
Advance Information
IHH
.
5.5
To allow portability of code, a PIC18F2XK20/4XK20
programmer is required to read the data EEPROM
information from the hex file. If data EEPROM informa-
tion is not present, a simple warning message should
be issued. Similarly, when saving a hex file, all data
EEPROM information must be included. An option to
not include the data EEPROM information may be pro-
vided. When embedding data EEPROM information in
the hex file, it should start at address F00000h.
Microchip Technology Inc. believes that this feature is
important for the benefit of the end customer.
5.6
The checksum is calculated by summing the following:
• The contents of all code memory locations
• The Configuration Word, appropriately masked
• ID locations (Only if any portion of program
The Least Significant 16 bits of this sum are the
checksum.
Code protection limits access to program memory by
both external programmer (code-protect) and code
execution (table read protect). The ID locations, when
included in a code protected checksum, contain the
checksum of an unprotected part. The unprotected
checksum is distributed: one nibble per ID location.
Each nibble is right justified.
Table 5-4 describes how to calculate the checksum for
each device.
memory is code-protected)
Note:
Embedding Data EEPROM
Information In the HEX File
Checksum Computation
The checksum calculation differs depend-
ing on the code-protect setting. Since the
code memory locations read out differently
depending on the code-protect setting, the
table describes how to manipulate the
actual code memory values to simulate
the values that would be read from a
protected device. When calculating a
checksum by reading a device, the entire
code memory can simply be read and
summed. The Configuration Word and ID
locations can always be read.
© 2009 Microchip Technology Inc.